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73068ce3b5
Fix the start address calculation when overlay is partially off screen. fb->bits_per_pixel is not set for YUV formats, and is always zero, which led to the first component always starting at zero. Use drm_format_plane_cpp() instead. This also revealed a problem in that YUYV formats toggle the U/V data for odd pixel start address offsets. We try to rectify that by toggling the U/V swap, which for the most part works, but seemingly introduces a flicker for one scan frame of swapped U/V. However, these changes result in an overall improvement. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
507 lines
15 KiB
C
507 lines
15 KiB
C
/*
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* Copyright (C) 2012 Russell King
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* Rewritten from the dovefb driver, and Armada510 manuals.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_plane_helper.h>
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#include "armada_crtc.h"
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#include "armada_drm.h"
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#include "armada_fb.h"
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#include "armada_gem.h"
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#include "armada_hw.h"
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#include <drm/armada_drm.h>
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#include "armada_ioctlP.h"
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struct armada_plane_properties {
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uint32_t colorkey_yr;
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uint32_t colorkey_ug;
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uint32_t colorkey_vb;
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#define K2R(val) (((val) >> 0) & 0xff)
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#define K2G(val) (((val) >> 8) & 0xff)
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#define K2B(val) (((val) >> 16) & 0xff)
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int16_t brightness;
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uint16_t contrast;
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uint16_t saturation;
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uint32_t colorkey_mode;
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};
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struct armada_plane {
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struct drm_plane base;
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spinlock_t lock;
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struct drm_framebuffer *old_fb;
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uint32_t src_hw;
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uint32_t dst_hw;
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uint32_t dst_yx;
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uint32_t ctrl0;
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struct {
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struct armada_vbl_event update;
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struct armada_regs regs[13];
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wait_queue_head_t wait;
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} vbl;
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struct armada_plane_properties prop;
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};
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#define drm_to_armada_plane(p) container_of(p, struct armada_plane, base)
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static void
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armada_ovl_update_attr(struct armada_plane_properties *prop,
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struct armada_crtc *dcrtc)
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{
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writel_relaxed(prop->colorkey_yr, dcrtc->base + LCD_SPU_COLORKEY_Y);
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writel_relaxed(prop->colorkey_ug, dcrtc->base + LCD_SPU_COLORKEY_U);
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writel_relaxed(prop->colorkey_vb, dcrtc->base + LCD_SPU_COLORKEY_V);
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writel_relaxed(prop->brightness << 16 | prop->contrast,
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dcrtc->base + LCD_SPU_CONTRAST);
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/* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */
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writel_relaxed(prop->saturation << 16,
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dcrtc->base + LCD_SPU_SATURATION);
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writel_relaxed(0x00002000, dcrtc->base + LCD_SPU_CBSH_HUE);
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spin_lock_irq(&dcrtc->irq_lock);
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armada_updatel(prop->colorkey_mode | CFG_ALPHAM_GRA,
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CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
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dcrtc->base + LCD_SPU_DMA_CTRL1);
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armada_updatel(ADV_GRACOLORKEY, 0, dcrtc->base + LCD_SPU_ADV_REG);
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spin_unlock_irq(&dcrtc->irq_lock);
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}
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/* === Plane support === */
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static void armada_plane_vbl(struct armada_crtc *dcrtc, void *data)
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{
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struct armada_plane *dplane = data;
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struct drm_framebuffer *fb;
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armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs);
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spin_lock(&dplane->lock);
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fb = dplane->old_fb;
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dplane->old_fb = NULL;
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spin_unlock(&dplane->lock);
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if (fb)
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armada_drm_queue_unref_work(dcrtc->crtc.dev, fb);
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wake_up(&dplane->vbl.wait);
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}
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static int
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armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h,
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uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h)
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{
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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struct drm_rect src = {
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.x1 = src_x,
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.y1 = src_y,
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.x2 = src_x + src_w,
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.y2 = src_y + src_h,
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};
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struct drm_rect dest = {
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.x1 = crtc_x,
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.y1 = crtc_y,
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.x2 = crtc_x + crtc_w,
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.y2 = crtc_y + crtc_h,
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};
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const struct drm_rect clip = {
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.x2 = crtc->mode.hdisplay,
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.y2 = crtc->mode.vdisplay,
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};
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uint32_t val, ctrl0;
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unsigned idx = 0;
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bool visible;
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int ret;
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ret = drm_plane_helper_check_update(plane, crtc, fb, &src, &dest, &clip,
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0, INT_MAX, true, false, &visible);
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if (ret)
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return ret;
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ctrl0 = CFG_DMA_FMT(drm_fb_to_armada_fb(fb)->fmt) |
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CFG_DMA_MOD(drm_fb_to_armada_fb(fb)->mod) |
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CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA;
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/* Does the position/size result in nothing to display? */
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if (!visible)
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ctrl0 &= ~CFG_DMA_ENA;
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if (!dcrtc->plane) {
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dcrtc->plane = plane;
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armada_ovl_update_attr(&dplane->prop, dcrtc);
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}
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/* FIXME: overlay on an interlaced display */
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/* Just updating the position/size? */
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if (plane->fb == fb && dplane->ctrl0 == ctrl0) {
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val = (drm_rect_height(&src) & 0xffff0000) |
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drm_rect_width(&src) >> 16;
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dplane->src_hw = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN);
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val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
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dplane->dst_hw = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN);
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val = dest.y1 << 16 | dest.x1;
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dplane->dst_yx = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN);
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return 0;
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} else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) {
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/* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
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armada_updatel(0, CFG_PDWN16x66 | CFG_PDWN32x66,
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dcrtc->base + LCD_SPU_SRAM_PARA1);
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}
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wait_event_timeout(dplane->vbl.wait,
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list_empty(&dplane->vbl.update.node),
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HZ/25);
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if (plane->fb != fb) {
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struct armada_gem_object *obj = drm_fb_obj(fb);
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uint32_t addr[3], pixel_format;
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int i, num_planes, hsub;
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/*
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* Take a reference on the new framebuffer - we want to
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* hold on to it while the hardware is displaying it.
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*/
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drm_framebuffer_reference(fb);
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if (plane->fb) {
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struct drm_framebuffer *older_fb;
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spin_lock_irq(&dplane->lock);
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older_fb = dplane->old_fb;
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dplane->old_fb = plane->fb;
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spin_unlock_irq(&dplane->lock);
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if (older_fb)
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armada_drm_queue_unref_work(dcrtc->crtc.dev,
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older_fb);
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}
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src_y = src.y1 >> 16;
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src_x = src.x1 >> 16;
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pixel_format = fb->pixel_format;
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hsub = drm_format_horz_chroma_subsampling(pixel_format);
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num_planes = drm_format_num_planes(pixel_format);
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/*
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* Annoyingly, shifting a YUYV-format image by one pixel
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* causes the U/V planes to toggle. Toggle the UV swap.
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* (Unfortunately, this causes momentary colour flickering.)
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*/
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if (src_x & (hsub - 1) && num_planes == 1)
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ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
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for (i = 0; i < num_planes; i++)
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addr[i] = obj->dev_addr + fb->offsets[i] +
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src_y * fb->pitches[i] +
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src_x * drm_format_plane_cpp(pixel_format, i);
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for (; i < ARRAY_SIZE(addr); i++)
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addr[i] = 0;
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
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LCD_SPU_DMA_START_ADDR_Y0);
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
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LCD_SPU_DMA_START_ADDR_U0);
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
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LCD_SPU_DMA_START_ADDR_V0);
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
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LCD_SPU_DMA_START_ADDR_Y1);
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
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LCD_SPU_DMA_START_ADDR_U1);
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
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LCD_SPU_DMA_START_ADDR_V1);
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val = fb->pitches[0] << 16 | fb->pitches[0];
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_PITCH_YC);
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val = fb->pitches[1] << 16 | fb->pitches[2];
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_PITCH_UV);
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}
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val = (drm_rect_height(&src) & 0xffff0000) | drm_rect_width(&src) >> 16;
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if (dplane->src_hw != val) {
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dplane->src_hw = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_HPXL_VLN);
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}
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val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
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if (dplane->dst_hw != val) {
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dplane->dst_hw = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DZM_HPXL_VLN);
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}
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val = dest.y1 << 16 | dest.x1;
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if (dplane->dst_yx != val) {
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dplane->dst_yx = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_OVSA_HPXL_VLN);
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}
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if (dplane->ctrl0 != ctrl0) {
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dplane->ctrl0 = ctrl0;
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armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0,
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CFG_CBSH_ENA | CFG_DMAFORMAT | CFG_DMA_FTOGGLE |
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CFG_DMA_HSMOOTH | CFG_DMA_TSTMODE |
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CFG_DMA_MOD(CFG_SWAPRB | CFG_SWAPUV | CFG_SWAPYU |
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CFG_YUV2RGB) | CFG_DMA_ENA,
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LCD_SPU_DMA_CTRL0);
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}
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if (idx) {
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armada_reg_queue_end(dplane->vbl.regs, idx);
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armada_drm_vbl_event_add(dcrtc, &dplane->vbl.update);
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}
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return 0;
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}
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static int armada_plane_disable(struct drm_plane *plane)
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{
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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struct drm_framebuffer *fb;
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struct armada_crtc *dcrtc;
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if (!dplane->base.crtc)
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return 0;
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dcrtc = drm_to_armada_crtc(dplane->base.crtc);
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dcrtc->plane = NULL;
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spin_lock_irq(&dcrtc->irq_lock);
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armada_drm_vbl_event_remove(dcrtc, &dplane->vbl.update);
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armada_updatel(0, CFG_DMA_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0);
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dplane->ctrl0 = 0;
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spin_unlock_irq(&dcrtc->irq_lock);
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/* Power down the Y/U/V FIFOs */
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armada_updatel(CFG_PDWN16x66 | CFG_PDWN32x66, 0,
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dcrtc->base + LCD_SPU_SRAM_PARA1);
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if (plane->fb)
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drm_framebuffer_unreference(plane->fb);
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spin_lock_irq(&dplane->lock);
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fb = dplane->old_fb;
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dplane->old_fb = NULL;
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spin_unlock_irq(&dplane->lock);
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if (fb)
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drm_framebuffer_unreference(fb);
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return 0;
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}
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static void armada_plane_destroy(struct drm_plane *plane)
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{
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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drm_plane_cleanup(plane);
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kfree(dplane);
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}
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static int armada_plane_set_property(struct drm_plane *plane,
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struct drm_property *property, uint64_t val)
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{
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struct armada_private *priv = plane->dev->dev_private;
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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bool update_attr = false;
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if (property == priv->colorkey_prop) {
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#define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8)
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dplane->prop.colorkey_yr = CCC(K2R(val));
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dplane->prop.colorkey_ug = CCC(K2G(val));
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dplane->prop.colorkey_vb = CCC(K2B(val));
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#undef CCC
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update_attr = true;
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} else if (property == priv->colorkey_min_prop) {
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dplane->prop.colorkey_yr &= ~0x00ff0000;
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dplane->prop.colorkey_yr |= K2R(val) << 16;
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dplane->prop.colorkey_ug &= ~0x00ff0000;
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dplane->prop.colorkey_ug |= K2G(val) << 16;
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dplane->prop.colorkey_vb &= ~0x00ff0000;
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dplane->prop.colorkey_vb |= K2B(val) << 16;
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update_attr = true;
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} else if (property == priv->colorkey_max_prop) {
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dplane->prop.colorkey_yr &= ~0xff000000;
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dplane->prop.colorkey_yr |= K2R(val) << 24;
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dplane->prop.colorkey_ug &= ~0xff000000;
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dplane->prop.colorkey_ug |= K2G(val) << 24;
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dplane->prop.colorkey_vb &= ~0xff000000;
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dplane->prop.colorkey_vb |= K2B(val) << 24;
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update_attr = true;
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} else if (property == priv->colorkey_val_prop) {
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dplane->prop.colorkey_yr &= ~0x0000ff00;
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dplane->prop.colorkey_yr |= K2R(val) << 8;
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dplane->prop.colorkey_ug &= ~0x0000ff00;
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dplane->prop.colorkey_ug |= K2G(val) << 8;
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dplane->prop.colorkey_vb &= ~0x0000ff00;
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dplane->prop.colorkey_vb |= K2B(val) << 8;
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update_attr = true;
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} else if (property == priv->colorkey_alpha_prop) {
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dplane->prop.colorkey_yr &= ~0x000000ff;
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dplane->prop.colorkey_yr |= K2R(val);
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dplane->prop.colorkey_ug &= ~0x000000ff;
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dplane->prop.colorkey_ug |= K2G(val);
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dplane->prop.colorkey_vb &= ~0x000000ff;
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dplane->prop.colorkey_vb |= K2B(val);
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update_attr = true;
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} else if (property == priv->colorkey_mode_prop) {
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dplane->prop.colorkey_mode &= ~CFG_CKMODE_MASK;
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dplane->prop.colorkey_mode |= CFG_CKMODE(val);
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update_attr = true;
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} else if (property == priv->brightness_prop) {
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dplane->prop.brightness = val - 256;
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update_attr = true;
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} else if (property == priv->contrast_prop) {
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dplane->prop.contrast = val;
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update_attr = true;
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} else if (property == priv->saturation_prop) {
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dplane->prop.saturation = val;
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update_attr = true;
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}
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if (update_attr && dplane->base.crtc)
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armada_ovl_update_attr(&dplane->prop,
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drm_to_armada_crtc(dplane->base.crtc));
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return 0;
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}
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static const struct drm_plane_funcs armada_plane_funcs = {
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.update_plane = armada_plane_update,
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.disable_plane = armada_plane_disable,
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.destroy = armada_plane_destroy,
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.set_property = armada_plane_set_property,
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};
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static const uint32_t armada_formats[] = {
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DRM_FORMAT_UYVY,
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DRM_FORMAT_YUYV,
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DRM_FORMAT_YUV420,
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DRM_FORMAT_YVU420,
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DRM_FORMAT_YUV422,
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DRM_FORMAT_YVU422,
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DRM_FORMAT_VYUY,
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DRM_FORMAT_YVYU,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_RGB888,
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DRM_FORMAT_BGR888,
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_ABGR1555,
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DRM_FORMAT_RGB565,
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DRM_FORMAT_BGR565,
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};
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static struct drm_prop_enum_list armada_drm_colorkey_enum_list[] = {
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{ CKMODE_DISABLE, "disabled" },
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{ CKMODE_Y, "Y component" },
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{ CKMODE_U, "U component" },
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{ CKMODE_V, "V component" },
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{ CKMODE_RGB, "RGB" },
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{ CKMODE_R, "R component" },
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{ CKMODE_G, "G component" },
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{ CKMODE_B, "B component" },
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};
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static int armada_overlay_create_properties(struct drm_device *dev)
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{
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struct armada_private *priv = dev->dev_private;
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if (priv->colorkey_prop)
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return 0;
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priv->colorkey_prop = drm_property_create_range(dev, 0,
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"colorkey", 0, 0xffffff);
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priv->colorkey_min_prop = drm_property_create_range(dev, 0,
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"colorkey_min", 0, 0xffffff);
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priv->colorkey_max_prop = drm_property_create_range(dev, 0,
|
|
"colorkey_max", 0, 0xffffff);
|
|
priv->colorkey_val_prop = drm_property_create_range(dev, 0,
|
|
"colorkey_val", 0, 0xffffff);
|
|
priv->colorkey_alpha_prop = drm_property_create_range(dev, 0,
|
|
"colorkey_alpha", 0, 0xffffff);
|
|
priv->colorkey_mode_prop = drm_property_create_enum(dev, 0,
|
|
"colorkey_mode",
|
|
armada_drm_colorkey_enum_list,
|
|
ARRAY_SIZE(armada_drm_colorkey_enum_list));
|
|
priv->brightness_prop = drm_property_create_range(dev, 0,
|
|
"brightness", 0, 256 + 255);
|
|
priv->contrast_prop = drm_property_create_range(dev, 0,
|
|
"contrast", 0, 0x7fff);
|
|
priv->saturation_prop = drm_property_create_range(dev, 0,
|
|
"saturation", 0, 0x7fff);
|
|
|
|
if (!priv->colorkey_prop)
|
|
return -ENOMEM;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
|
|
{
|
|
struct armada_private *priv = dev->dev_private;
|
|
struct drm_mode_object *mobj;
|
|
struct armada_plane *dplane;
|
|
int ret;
|
|
|
|
ret = armada_overlay_create_properties(dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dplane = kzalloc(sizeof(*dplane), GFP_KERNEL);
|
|
if (!dplane)
|
|
return -ENOMEM;
|
|
|
|
spin_lock_init(&dplane->lock);
|
|
init_waitqueue_head(&dplane->vbl.wait);
|
|
armada_drm_vbl_event_init(&dplane->vbl.update, armada_plane_vbl,
|
|
dplane);
|
|
|
|
drm_plane_init(dev, &dplane->base, crtcs, &armada_plane_funcs,
|
|
armada_formats, ARRAY_SIZE(armada_formats), false);
|
|
|
|
dplane->prop.colorkey_yr = 0xfefefe00;
|
|
dplane->prop.colorkey_ug = 0x01010100;
|
|
dplane->prop.colorkey_vb = 0x01010100;
|
|
dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB);
|
|
dplane->prop.brightness = 0;
|
|
dplane->prop.contrast = 0x4000;
|
|
dplane->prop.saturation = 0x4000;
|
|
|
|
mobj = &dplane->base.base;
|
|
drm_object_attach_property(mobj, priv->colorkey_prop,
|
|
0x0101fe);
|
|
drm_object_attach_property(mobj, priv->colorkey_min_prop,
|
|
0x0101fe);
|
|
drm_object_attach_property(mobj, priv->colorkey_max_prop,
|
|
0x0101fe);
|
|
drm_object_attach_property(mobj, priv->colorkey_val_prop,
|
|
0x0101fe);
|
|
drm_object_attach_property(mobj, priv->colorkey_alpha_prop,
|
|
0x000000);
|
|
drm_object_attach_property(mobj, priv->colorkey_mode_prop,
|
|
CKMODE_RGB);
|
|
drm_object_attach_property(mobj, priv->brightness_prop, 256);
|
|
drm_object_attach_property(mobj, priv->contrast_prop,
|
|
dplane->prop.contrast);
|
|
drm_object_attach_property(mobj, priv->saturation_prop,
|
|
dplane->prop.saturation);
|
|
|
|
return 0;
|
|
}
|