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971232cf7c
Use enum usb_dr_mode and drop default usb_dr_mode from platform data. USB DT bindings states: dr_mode: "...In case this attribute isn't passed via DT, USB DRD controllers should default to OTG...", so remove redundand field. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
249 lines
5.9 KiB
C
249 lines
5.9 KiB
C
/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/usb/msm_hsusb.h>
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#include <linux/err.h>
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#include <linux/clkdev.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <mach/irqs.h>
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#include <mach/sirc.h>
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#include <mach/vreg.h>
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#include <mach/clk.h>
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#include <linux/platform_data/mmc-msm_sdcc.h>
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#include "devices.h"
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#include "common.h"
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static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300;
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static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156;
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/* Leave smc91x resources empty here, as we'll fill them in
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* at run-time: they vary from board to board, and the true
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* configuration won't be known until boot.
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*/
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static struct resource smc91x_resources[] = {
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[0] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static int __init msm_init_smc91x(void)
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{
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if (machine_is_qsd8x50_surf()) {
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smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
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smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff;
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smc91x_resources[1].start =
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gpio_to_irq(qsd8x50_surf_smc91x_gpio);
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smc91x_resources[1].end =
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gpio_to_irq(qsd8x50_surf_smc91x_gpio);
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platform_device_register(&smc91x_device);
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}
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return 0;
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}
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module_init(msm_init_smc91x);
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static int hsusb_phy_init_seq[] = {
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0x08, 0x31, /* Increase HS Driver Amplitude */
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0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */
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-1
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};
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static int hsusb_link_clk_reset(struct clk *link_clk, bool assert)
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{
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int ret;
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if (assert) {
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ret = clk_reset(link_clk, CLK_RESET_ASSERT);
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if (ret)
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pr_err("usb hs_clk assert failed\n");
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} else {
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ret = clk_reset(link_clk, CLK_RESET_DEASSERT);
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if (ret)
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pr_err("usb hs_clk deassert failed\n");
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}
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return ret;
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}
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static int hsusb_phy_clk_reset(struct clk *phy_clk)
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{
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int ret;
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ret = clk_reset(phy_clk, CLK_RESET_ASSERT);
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if (ret) {
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pr_err("usb phy clk assert failed\n");
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return ret;
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}
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usleep_range(10000, 12000);
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ret = clk_reset(phy_clk, CLK_RESET_DEASSERT);
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if (ret)
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pr_err("usb phy clk deassert failed\n");
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return ret;
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}
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static struct msm_otg_platform_data msm_otg_pdata = {
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.phy_init_seq = hsusb_phy_init_seq,
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.mode = USB_DR_MODE_PERIPHERAL,
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.otg_control = OTG_PHY_CONTROL,
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.link_clk_reset = hsusb_link_clk_reset,
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.phy_clk_reset = hsusb_phy_clk_reset,
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};
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static struct platform_device *devices[] __initdata = {
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&msm_clock_8x50,
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&msm_device_gpio_8x50,
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&msm_device_uart3,
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&msm_device_smd,
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&msm_device_otg,
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&msm_device_hsusb,
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&msm_device_hsusb_host,
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};
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static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
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{51, "sdc1_dat_3"},
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{52, "sdc1_dat_2"},
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{53, "sdc1_dat_1"},
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{54, "sdc1_dat_0"},
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{55, "sdc1_cmd"},
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{56, "sdc1_clk"}
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};
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static struct vreg *vreg_mmc;
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static unsigned long vreg_sts;
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static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
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{
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int rc = 0;
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struct platform_device *pdev;
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pdev = container_of(dv, struct platform_device, dev);
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if (vdd == 0) {
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if (!vreg_sts)
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return 0;
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clear_bit(pdev->id, &vreg_sts);
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if (!vreg_sts) {
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rc = vreg_disable(vreg_mmc);
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if (rc)
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pr_err("vreg_mmc disable failed for slot "
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"%d: %d\n", pdev->id, rc);
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}
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return 0;
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}
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if (!vreg_sts) {
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rc = vreg_set_level(vreg_mmc, 2900);
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if (rc)
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pr_err("vreg_mmc set level failed for slot %d: %d\n",
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pdev->id, rc);
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rc = vreg_enable(vreg_mmc);
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if (rc)
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pr_err("vreg_mmc enable failed for slot %d: %d\n",
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pdev->id, rc);
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}
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set_bit(pdev->id, &vreg_sts);
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return 0;
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}
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static struct msm_mmc_gpio_data sdc1_gpio = {
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.gpio = sdc1_gpio_cfg,
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.size = ARRAY_SIZE(sdc1_gpio_cfg),
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};
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static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
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.ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
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.translate_vdd = msm_sdcc_setup_power,
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.gpio_data = &sdc1_gpio,
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};
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static void __init qsd8x50_init_mmc(void)
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{
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vreg_mmc = vreg_get(NULL, "gp5");
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if (IS_ERR(vreg_mmc)) {
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pr_err("vreg get for vreg_mmc failed (%ld)\n",
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PTR_ERR(vreg_mmc));
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return;
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}
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msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
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}
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static void __init qsd8x50_map_io(void)
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{
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msm_map_qsd8x50_io();
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}
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static void __init qsd8x50_init_irq(void)
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{
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msm_init_irq();
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msm_init_sirc();
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}
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static void __init qsd8x50_init(void)
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{
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msm_device_otg.dev.platform_data = &msm_otg_pdata;
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msm_device_hsusb.dev.parent = &msm_device_otg.dev;
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msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
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platform_add_devices(devices, ARRAY_SIZE(devices));
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qsd8x50_init_mmc();
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}
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static void __init qsd8x50_init_late(void)
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{
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smd_debugfs_init();
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}
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MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
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.atag_offset = 0x100,
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.map_io = qsd8x50_map_io,
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.init_irq = qsd8x50_init_irq,
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.init_machine = qsd8x50_init,
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.init_late = qsd8x50_init_late,
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.init_time = qsd8x50_timer_init,
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MACHINE_END
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MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
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.atag_offset = 0x100,
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.map_io = qsd8x50_map_io,
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.init_irq = qsd8x50_init_irq,
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.init_machine = qsd8x50_init,
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.init_late = qsd8x50_init_late,
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.init_time = qsd8x50_timer_init,
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MACHINE_END
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