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778f2e7a7b
Define the Porter board dependent part of the VIN0 device node.
Add the device node for Analog Devices ADV7180 video decoder to I2C2 bus.
Add the necessary subnodes to interconnect VIN0 and ADV7180 devices.
This patch is analogous to the commit 8d62f4f753 ("ARM: shmobile:
henninger: add VIN0/ADV7180 DT support") as there are no differences
between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
209 lines
3.7 KiB
Plaintext
209 lines
3.7 KiB
Plaintext
/*
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* Device Tree Source for the Porter board
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*
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* Copyright (C) 2015 Cogent Embedded, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r8a7791.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Porter";
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compatible = "renesas,porter", "renesas,r8a7791";
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aliases {
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serial0 = &scif0;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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stdout-path = &scif0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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memory@200000000 {
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device_type = "memory";
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reg = <2 0x00000000 0 0x40000000>;
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};
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vcc_sdhi0: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccq_sdhi0: regulator@1 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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vcc_sdhi2: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI2 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccq_sdhi2: regulator@3 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI2 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&pfc {
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scif0_pins: serial0 {
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renesas,groups = "scif0_data_d";
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renesas,function = "scif0";
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};
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ether_pins: ether {
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renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
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renesas,function = "eth";
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};
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phy1_pins: phy1 {
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renesas,groups = "intc_irq0";
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renesas,function = "intc";
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};
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sdhi0_pins: sd0 {
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renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
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renesas,function = "sdhi0";
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};
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sdhi2_pins: sd2 {
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renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
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renesas,function = "sdhi2";
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};
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i2c2_pins: i2c2 {
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renesas,groups = "i2c2";
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renesas,function = "i2c2";
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};
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vin0_pins: vin0 {
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renesas,groups = "vin0_data8", "vin0_clk";
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renesas,function = "vin0";
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};
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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ðer {
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pinctrl-0 = <ðer_pins &phy1_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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status = "ok";
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phy1: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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};
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi0>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&sdhi2 {
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi2>;
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vqmmc-supply = <&vccq_sdhi2>;
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cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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composite-in@20 {
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compatible = "adi,adv7180";
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reg = <0x20>;
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remote = <&vin0>;
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port {
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adv7180: endpoint {
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bus-width = <8>;
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remote-endpoint = <&vin0ep>;
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};
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};
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};
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};
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&sata0 {
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status = "okay";
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};
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/* composite video input */
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&vin0 {
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status = "ok";
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pinctrl-0 = <&vin0_pins>;
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pinctrl-names = "default";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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vin0ep: endpoint {
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remote-endpoint = <&adv7180>;
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bus-width = <8>;
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};
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};
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};
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