linux/arch/um/scripts/Makefile.rules
Paolo 'Blaisorblade' Giarrusso 776cfebb43 [PATCH] uml kbuild: avoid useless rebuilds
- Fix some problems with usage of $(targets) (sometimes missing, sometimes
  used badly) that trigger partial rebuilds when doing a rebuild.

- At that purpose, also factor out some common code for symlinks creation.

- Fix a x86-64 build warning, caused by -L/usr/lib, which is anyway useless,
  and invalid in the x86-64 case.

Tested on x86_64 and x86.

Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-05-05 16:36:33 -07:00

28 lines
1.1 KiB
Makefile

# ===========================================================================
# arch/um: Generic definitions
# ===========================================================================
USER_SINGLE_OBJS = $(foreach f,$(patsubst %.o,%,$(obj-y) $(obj-m)),$($(f)-objs))
USER_OBJS += $(filter %_user.o,$(obj-y) $(obj-m) $(USER_SINGLE_OBJS))
USER_OBJS := $(foreach file,$(USER_OBJS),$(obj)/$(file))
$(USER_OBJS): c_flags = -Wp,-MD,$(depfile) $(USER_CFLAGS) $(CFLAGS_$(notdir $@))
quiet_cmd_make_link = SYMLINK $@
cmd_make_link = ln -sf $(srctree)/arch/$(SUBARCH)/$($(notdir $@)-dir)/$(notdir $@) $@
# this needs to be before the foreach, because targets does not accept
# complete paths like $(obj)/$(f). To make sure this works, use a := assignment,
# or we will get $(obj)/$(f) in the "targets" value.
# Also, this forces you to use the := syntax when assigning to targets.
# Otherwise the line below will cause an infinite loop (if you don't know why,
# just do it).
targets := $(targets) $(SYMLINKS)
SYMLINKS := $(foreach f,$(SYMLINKS),$(obj)/$(f))
$(SYMLINKS): FORCE
$(call if_changed,make_link)