linux/drivers/net/dsa/realtek
Russell King (Oracle) b22eef6864 net: dsa: realtek: add phylink_get_caps implementation
The user ports use RSGMII, but we don't have that, and DT doesn't
specify a phy interface mode, so phylib defaults to GMII. These support
1G, 100M and 10M with flow control. It is unknown whether asymetric
pause is supported at all speeds.

The CPU port uses MII/GMII/RGMII/REVMII by hardware pin strapping,
and support speeds specific to each, with full duplex only supported
in some modes. Flow control may be supported again by hardware pin
strapping, and theoretically is readable through a register but no
information is given in the datasheet for that.

So, we do a best efforts - and be lenient.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-20 11:38:43 +01:00
..
Kconfig net: dsa: realtek: fix Kconfig to assure consistent driver linkage 2022-04-13 14:30:31 +01:00
Makefile net: dsa: realtek: add new mdio interface for drivers 2022-01-28 15:02:49 +00:00
realtek-mdio.c net: dsa: realtek: Remove redundant of_match_ptr() 2023-08-16 09:59:40 +01:00
realtek-smi.c net: dsa: realtek: Remove redundant of_match_ptr() 2023-08-16 09:59:40 +01:00
realtek.h net: dsa: realtek: allow subdrivers to externally lock regmap 2022-02-23 12:24:29 +00:00
rtl8365mb.c net: dsa: realtek: rtl8365mb: add change_mtu 2023-03-17 07:45:06 +00:00
rtl8366-core.c net: dsa: realtek: convert subdrivers into modules 2022-01-28 15:02:49 +00:00
rtl8366rb.c net: dsa: realtek: add phylink_get_caps implementation 2023-08-20 11:38:43 +01:00