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bb477de2ef
When building as module:
ERROR: "cpufreq_gov_performance" [arch/arm/plat-mxc/cpufreq.ko] undefined!
WARNING: modpost: Found 1 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2
It's due to the driver using CPUFREQ_DEFAULT_GOVERNOR, even it should not
(see commit 8122c6cea0
in Linus tree), so
remove it.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
206 lines
4.7 KiB
C
206 lines
4.7 KiB
C
/*
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* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/*
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* A driver for the Freescale Semiconductor i.MXC CPUfreq module.
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* The CPUFREQ driver is for controling CPU frequency. It allows you to change
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* the CPU clock speed on the fly.
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*/
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <mach/hardware.h>
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#include <mach/clock.h>
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#define CLK32_FREQ 32768
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#define NANOSECOND (1000 * 1000 * 1000)
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struct cpu_op *(*get_cpu_op)(int *op);
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static int cpu_freq_khz_min;
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static int cpu_freq_khz_max;
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static struct clk *cpu_clk;
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static struct cpufreq_frequency_table *imx_freq_table;
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static int cpu_op_nr;
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static struct cpu_op *cpu_op_tbl;
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static int set_cpu_freq(int freq)
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{
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int ret = 0;
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int org_cpu_rate;
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org_cpu_rate = clk_get_rate(cpu_clk);
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if (org_cpu_rate == freq)
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return ret;
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ret = clk_set_rate(cpu_clk, freq);
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if (ret != 0) {
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printk(KERN_DEBUG "cannot set CPU clock rate\n");
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return ret;
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}
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return ret;
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}
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static int mxc_verify_speed(struct cpufreq_policy *policy)
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{
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if (policy->cpu != 0)
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return -EINVAL;
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return cpufreq_frequency_table_verify(policy, imx_freq_table);
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}
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static unsigned int mxc_get_speed(unsigned int cpu)
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{
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if (cpu)
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return 0;
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return clk_get_rate(cpu_clk) / 1000;
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}
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static int mxc_set_target(struct cpufreq_policy *policy,
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unsigned int target_freq, unsigned int relation)
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{
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struct cpufreq_freqs freqs;
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int freq_Hz;
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int ret = 0;
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unsigned int index;
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cpufreq_frequency_table_target(policy, imx_freq_table,
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target_freq, relation, &index);
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freq_Hz = imx_freq_table[index].frequency * 1000;
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freqs.old = clk_get_rate(cpu_clk) / 1000;
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freqs.new = freq_Hz / 1000;
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freqs.cpu = 0;
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freqs.flags = 0;
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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ret = set_cpu_freq(freq_Hz);
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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return ret;
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}
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static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
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{
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int ret;
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int i;
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printk(KERN_INFO "i.MXC CPU frequency driver\n");
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if (policy->cpu != 0)
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return -EINVAL;
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if (!get_cpu_op)
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return -EINVAL;
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cpu_clk = clk_get(NULL, "cpu_clk");
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if (IS_ERR(cpu_clk)) {
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printk(KERN_ERR "%s: failed to get cpu clock\n", __func__);
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return PTR_ERR(cpu_clk);
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}
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cpu_op_tbl = get_cpu_op(&cpu_op_nr);
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cpu_freq_khz_min = cpu_op_tbl[0].cpu_rate / 1000;
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cpu_freq_khz_max = cpu_op_tbl[0].cpu_rate / 1000;
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imx_freq_table = kmalloc(
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sizeof(struct cpufreq_frequency_table) * (cpu_op_nr + 1),
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GFP_KERNEL);
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if (!imx_freq_table) {
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ret = -ENOMEM;
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goto err1;
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}
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for (i = 0; i < cpu_op_nr; i++) {
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imx_freq_table[i].index = i;
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imx_freq_table[i].frequency = cpu_op_tbl[i].cpu_rate / 1000;
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if ((cpu_op_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min)
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cpu_freq_khz_min = cpu_op_tbl[i].cpu_rate / 1000;
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if ((cpu_op_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max)
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cpu_freq_khz_max = cpu_op_tbl[i].cpu_rate / 1000;
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}
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imx_freq_table[i].index = i;
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imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
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policy->cur = clk_get_rate(cpu_clk) / 1000;
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policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min;
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policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max;
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/* Manual states, that PLL stabilizes in two CLK32 periods */
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policy->cpuinfo.transition_latency = 2 * NANOSECOND / CLK32_FREQ;
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ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table);
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if (ret < 0) {
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printk(KERN_ERR "%s: failed to register i.MXC CPUfreq \
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with error code %d\n", __func__, ret);
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goto err;
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}
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cpufreq_frequency_table_get_attr(imx_freq_table, policy->cpu);
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return 0;
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err:
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kfree(imx_freq_table);
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err1:
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clk_put(cpu_clk);
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return ret;
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}
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static int mxc_cpufreq_exit(struct cpufreq_policy *policy)
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{
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cpufreq_frequency_table_put_attr(policy->cpu);
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set_cpu_freq(cpu_freq_khz_max * 1000);
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clk_put(cpu_clk);
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kfree(imx_freq_table);
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return 0;
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}
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static struct cpufreq_driver mxc_driver = {
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.flags = CPUFREQ_STICKY,
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.verify = mxc_verify_speed,
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.target = mxc_set_target,
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.get = mxc_get_speed,
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.init = mxc_cpufreq_init,
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.exit = mxc_cpufreq_exit,
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.name = "imx",
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};
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static int __devinit mxc_cpufreq_driver_init(void)
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{
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return cpufreq_register_driver(&mxc_driver);
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}
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static void mxc_cpufreq_driver_exit(void)
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{
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cpufreq_unregister_driver(&mxc_driver);
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}
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module_init(mxc_cpufreq_driver_init);
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module_exit(mxc_cpufreq_driver_exit);
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MODULE_AUTHOR("Freescale Semiconductor Inc. Yong Shen <yong.shen@linaro.org>");
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MODULE_DESCRIPTION("CPUfreq driver for i.MX");
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MODULE_LICENSE("GPL");
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