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Although naming across the codebase isn't that consistent, it tends to follow certain patterns. Moreover, the term "flush" isn't defined in the Arm Architecture reference manual, and might be interpreted to mean clean, invalidate, or both for a cache. Rename arm64-internal functions to make the naming internally consistent, as well as making it consistent with the Arm ARM, by specifying whether it applies to the instruction, data, or both caches, whether the operation is a clean, invalidate, or both. Also specify which point the operation applies to, i.e., to the point of unification (PoU), coherency (PoC), or persistence (PoP). This commit applies the following sed transformation to all files under arch/arm64: "s/\b__flush_cache_range\b/caches_clean_inval_pou_macro/g;"\ "s/\b__flush_icache_range\b/caches_clean_inval_pou/g;"\ "s/\binvalidate_icache_range\b/icache_inval_pou/g;"\ "s/\b__flush_dcache_area\b/dcache_clean_inval_poc/g;"\ "s/\b__inval_dcache_area\b/dcache_inval_poc/g;"\ "s/__clean_dcache_area_poc\b/dcache_clean_poc/g;"\ "s/\b__clean_dcache_area_pop\b/dcache_clean_pop/g;"\ "s/\b__clean_dcache_area_pou\b/dcache_clean_pou/g;"\ "s/\b__flush_cache_user_range\b/caches_clean_inval_user_pou/g;"\ "s/\b__flush_icache_all\b/icache_inval_all_pou/g;" Note that __clean_dcache_area_poc is deliberately missing a word boundary check at the beginning in order to match the efistub symbols in image-vars.h. Also note that, despite its name, __flush_icache_range operates on both instruction and data caches. The name change here reflects that. No functional change intended. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20210524083001.2586635-19-tabba@google.com Signed-off-by: Will Deacon <will@kernel.org>
96 lines
2.4 KiB
C
96 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/mm/flush.c
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*
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* Copyright (C) 1995-2002 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/export.h>
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#include <linux/mm.h>
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#include <linux/pagemap.h>
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#include <asm/cacheflush.h>
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#include <asm/cache.h>
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#include <asm/tlbflush.h>
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void sync_icache_aliases(unsigned long start, unsigned long end)
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{
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if (icache_is_aliasing()) {
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dcache_clean_pou(start, end);
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icache_inval_all_pou();
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} else {
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/*
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* Don't issue kick_all_cpus_sync() after I-cache invalidation
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* for user mappings.
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*/
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caches_clean_inval_pou(start, end);
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}
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}
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static void flush_ptrace_access(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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if (vma->vm_flags & VM_EXEC)
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sync_icache_aliases(start, end);
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}
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/*
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* Copy user data from/to a page which is mapped into a different processes
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* address space. Really, we want to allow our "user space" model to handle
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* this.
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*/
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void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long uaddr, void *dst, const void *src,
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unsigned long len)
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{
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memcpy(dst, src, len);
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flush_ptrace_access(vma, (unsigned long)dst, (unsigned long)dst + len);
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}
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void __sync_icache_dcache(pte_t pte)
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{
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struct page *page = pte_page(pte);
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if (!test_bit(PG_dcache_clean, &page->flags)) {
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sync_icache_aliases((unsigned long)page_address(page),
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(unsigned long)page_address(page) +
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page_size(page));
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set_bit(PG_dcache_clean, &page->flags);
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}
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}
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EXPORT_SYMBOL_GPL(__sync_icache_dcache);
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/*
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* This function is called when a page has been modified by the kernel. Mark
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* it as dirty for later flushing when mapped in user space (if executable,
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* see __sync_icache_dcache).
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*/
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void flush_dcache_page(struct page *page)
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{
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if (test_bit(PG_dcache_clean, &page->flags))
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clear_bit(PG_dcache_clean, &page->flags);
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}
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EXPORT_SYMBOL(flush_dcache_page);
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/*
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* Additional functions defined in assembly.
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*/
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EXPORT_SYMBOL(caches_clean_inval_pou);
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#ifdef CONFIG_ARCH_HAS_PMEM_API
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void arch_wb_cache_pmem(void *addr, size_t size)
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{
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/* Ensure order against any prior non-cacheable writes */
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dmb(osh);
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dcache_clean_pop((unsigned long)addr, (unsigned long)addr + size);
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}
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EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
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void arch_invalidate_pmem(void *addr, size_t size)
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{
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dcache_inval_poc((unsigned long)addr, (unsigned long)addr + size);
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}
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EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
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#endif
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