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9ce062ba6a
IPA initialization includes loading some firmware. This step is done either by the modem or by the AP under Trust Zone. If the AP loads firmware, the name of the firmware file is currently hard-coded ("ipa_fws.mdt"). Add the ability to specify the relative path of the firmware file to use in a property in the Device Tree IPA node. If the property is not found (or if any other error occurs attempting to get it), fall back to using a default relative path. Use the "old" fixed name as the default. Rename the symbol that represents this default to emphasize its purpose. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
899 lines
26 KiB
C
899 lines
26 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2018-2021 Linaro Ltd.
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*/
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#include <linux/types.h>
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#include <linux/atomic.h>
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#include <linux/bitfield.h>
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#include <linux/device.h>
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#include <linux/bug.h>
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#include <linux/io.h>
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/qcom_scm.h>
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#include <linux/soc/qcom/mdt_loader.h>
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#include "ipa.h"
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#include "ipa_clock.h"
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#include "ipa_data.h"
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#include "ipa_endpoint.h"
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#include "ipa_resource.h"
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#include "ipa_cmd.h"
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#include "ipa_reg.h"
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#include "ipa_mem.h"
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#include "ipa_table.h"
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#include "ipa_modem.h"
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#include "ipa_uc.h"
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#include "ipa_interrupt.h"
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#include "gsi_trans.h"
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/**
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* DOC: The IP Accelerator
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*
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* This driver supports the Qualcomm IP Accelerator (IPA), which is a
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* networking component found in many Qualcomm SoCs. The IPA is connected
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* to the application processor (AP), but is also connected (and partially
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* controlled by) other "execution environments" (EEs), such as a modem.
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*
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* The IPA is the conduit between the AP and the modem that carries network
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* traffic. This driver presents a network interface representing the
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* connection of the modem to external (e.g. LTE) networks.
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*
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* The IPA provides protocol checksum calculation, offloading this work
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* from the AP. The IPA offers additional functionality, including routing,
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* filtering, and NAT support, but that more advanced functionality is not
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* currently supported. Despite that, some resources--including routing
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* tables and filter tables--are defined in this driver because they must
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* be initialized even when the advanced hardware features are not used.
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*
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* There are two distinct layers that implement the IPA hardware, and this
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* is reflected in the organization of the driver. The generic software
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* interface (GSI) is an integral component of the IPA, providing a
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* well-defined communication layer between the AP subsystem and the IPA
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* core. The GSI implements a set of "channels" used for communication
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* between the AP and the IPA.
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*
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* The IPA layer uses GSI channels to implement its "endpoints". And while
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* a GSI channel carries data between the AP and the IPA, a pair of IPA
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* endpoints is used to carry traffic between two EEs. Specifically, the main
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* modem network interface is implemented by two pairs of endpoints: a TX
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* endpoint on the AP coupled with an RX endpoint on the modem; and another
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* RX endpoint on the AP receiving data from a TX endpoint on the modem.
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*/
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/* The name of the GSI firmware file relative to /lib/firmware */
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#define IPA_FW_PATH_DEFAULT "ipa_fws.mdt"
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#define IPA_PAS_ID 15
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/* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */
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#define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */
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#define TAG_TIMESTAMP_SHIFT 14
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#define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */
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/* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */
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#define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */
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/**
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* ipa_suspend_handler() - Handle the suspend IPA interrupt
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* @ipa: IPA pointer
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* @irq_id: IPA interrupt type (unused)
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*
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* If an RX endpoint is in suspend state, and the IPA has a packet
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* destined for that endpoint, the IPA generates a SUSPEND interrupt
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* to inform the AP that it should resume the endpoint. If we get
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* one of these interrupts we just resume everything.
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*/
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static void ipa_suspend_handler(struct ipa *ipa, enum ipa_irq_id irq_id)
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{
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/* Just report the event, and let system resume handle the rest.
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* More than one endpoint could signal this; if so, ignore
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* all but the first.
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*/
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if (!test_and_set_bit(IPA_FLAG_RESUMED, ipa->flags))
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pm_wakeup_dev_event(&ipa->pdev->dev, 0, true);
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/* Acknowledge/clear the suspend interrupt on all endpoints */
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ipa_interrupt_suspend_clear_all(ipa->interrupt);
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}
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/**
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* ipa_setup() - Set up IPA hardware
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* @ipa: IPA pointer
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*
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* Perform initialization that requires issuing immediate commands on
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* the command TX endpoint. If the modem is doing GSI firmware load
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* and initialization, this function will be called when an SMP2P
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* interrupt has been signaled by the modem. Otherwise it will be
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* called from ipa_probe() after GSI firmware has been successfully
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* loaded, authenticated, and started by Trust Zone.
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*/
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int ipa_setup(struct ipa *ipa)
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{
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struct ipa_endpoint *exception_endpoint;
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struct ipa_endpoint *command_endpoint;
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struct device *dev = &ipa->pdev->dev;
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int ret;
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ret = gsi_setup(&ipa->gsi);
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if (ret)
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return ret;
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ipa->interrupt = ipa_interrupt_setup(ipa);
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if (IS_ERR(ipa->interrupt)) {
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ret = PTR_ERR(ipa->interrupt);
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goto err_gsi_teardown;
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}
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ipa_interrupt_add(ipa->interrupt, IPA_IRQ_TX_SUSPEND,
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ipa_suspend_handler);
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ipa_uc_setup(ipa);
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ret = device_init_wakeup(dev, true);
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if (ret)
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goto err_uc_teardown;
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ipa_endpoint_setup(ipa);
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/* We need to use the AP command TX endpoint to perform other
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* initialization, so we enable first.
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*/
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command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];
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ret = ipa_endpoint_enable_one(command_endpoint);
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if (ret)
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goto err_endpoint_teardown;
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ret = ipa_mem_setup(ipa); /* No matching teardown required */
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if (ret)
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goto err_command_disable;
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ret = ipa_table_setup(ipa); /* No matching teardown required */
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if (ret)
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goto err_command_disable;
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/* Enable the exception handling endpoint, and tell the hardware
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* to use it by default.
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*/
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exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];
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ret = ipa_endpoint_enable_one(exception_endpoint);
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if (ret)
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goto err_command_disable;
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ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id);
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/* We're all set. Now prepare for communication with the modem */
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ret = ipa_modem_setup(ipa);
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if (ret)
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goto err_default_route_clear;
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ipa->setup_complete = true;
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dev_info(dev, "IPA driver setup completed successfully\n");
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return 0;
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err_default_route_clear:
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ipa_endpoint_default_route_clear(ipa);
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ipa_endpoint_disable_one(exception_endpoint);
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err_command_disable:
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ipa_endpoint_disable_one(command_endpoint);
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err_endpoint_teardown:
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ipa_endpoint_teardown(ipa);
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(void)device_init_wakeup(dev, false);
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err_uc_teardown:
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ipa_uc_teardown(ipa);
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ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND);
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ipa_interrupt_teardown(ipa->interrupt);
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err_gsi_teardown:
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gsi_teardown(&ipa->gsi);
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return ret;
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}
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/**
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* ipa_teardown() - Inverse of ipa_setup()
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* @ipa: IPA pointer
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*/
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static void ipa_teardown(struct ipa *ipa)
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{
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struct ipa_endpoint *exception_endpoint;
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struct ipa_endpoint *command_endpoint;
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ipa_modem_teardown(ipa);
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ipa_endpoint_default_route_clear(ipa);
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exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];
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ipa_endpoint_disable_one(exception_endpoint);
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command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];
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ipa_endpoint_disable_one(command_endpoint);
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ipa_endpoint_teardown(ipa);
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(void)device_init_wakeup(&ipa->pdev->dev, false);
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ipa_uc_teardown(ipa);
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ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND);
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ipa_interrupt_teardown(ipa->interrupt);
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gsi_teardown(&ipa->gsi);
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}
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/* Configure bus access behavior for IPA components */
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static void ipa_hardware_config_comp(struct ipa *ipa)
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{
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u32 val;
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/* Nothing to configure prior to IPA v4.0 */
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if (ipa->version < IPA_VERSION_4_0)
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return;
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val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET);
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if (ipa->version == IPA_VERSION_4_0) {
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val &= ~IPA_QMB_SELECT_CONS_EN_FMASK;
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val &= ~IPA_QMB_SELECT_PROD_EN_FMASK;
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val &= ~IPA_QMB_SELECT_GLOBAL_EN_FMASK;
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} else if (ipa->version < IPA_VERSION_4_5) {
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val |= GSI_MULTI_AXI_MASTERS_DIS_FMASK;
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} else {
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/* For IPA v4.5 IPA_FULL_FLUSH_WAIT_RSC_CLOSE_EN is 0 */
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}
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val |= GSI_MULTI_INORDER_RD_DIS_FMASK;
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val |= GSI_MULTI_INORDER_WR_DIS_FMASK;
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iowrite32(val, ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET);
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}
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/* Configure DDR and (possibly) PCIe max read/write QSB values */
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static void
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ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data)
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{
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const struct ipa_qsb_data *data0;
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const struct ipa_qsb_data *data1;
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u32 val;
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/* assert(data->qsb_count > 0); */
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/* assert(data->qsb_count < 3); */
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/* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */
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data0 = &data->qsb_data[IPA_QSB_MASTER_DDR];
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if (data->qsb_count > 1)
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data1 = &data->qsb_data[IPA_QSB_MASTER_PCIE];
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/* Max outstanding write accesses for QSB masters */
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val = u32_encode_bits(data0->max_writes, GEN_QMB_0_MAX_WRITES_FMASK);
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if (data->qsb_count > 1)
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val |= u32_encode_bits(data1->max_writes,
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GEN_QMB_1_MAX_WRITES_FMASK);
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iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_WRITES_OFFSET);
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/* Max outstanding read accesses for QSB masters */
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val = u32_encode_bits(data0->max_reads, GEN_QMB_0_MAX_READS_FMASK);
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if (ipa->version >= IPA_VERSION_4_0)
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val |= u32_encode_bits(data0->max_reads_beats,
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GEN_QMB_0_MAX_READS_BEATS_FMASK);
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if (data->qsb_count > 1) {
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val |= u32_encode_bits(data1->max_reads,
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GEN_QMB_1_MAX_READS_FMASK);
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if (ipa->version >= IPA_VERSION_4_0)
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val |= u32_encode_bits(data1->max_reads_beats,
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GEN_QMB_1_MAX_READS_BEATS_FMASK);
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}
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iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET);
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}
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/* The internal inactivity timer clock is used for the aggregation timer */
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#define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */
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/* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY
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* field to represent the given number of microseconds. The value is one
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* less than the number of timer ticks in the requested period. 0 is not
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* a valid granularity value.
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*/
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static u32 ipa_aggr_granularity_val(u32 usec)
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{
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/* assert(usec != 0); */
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return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1;
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}
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/* IPA uses unified Qtime starting at IPA v4.5, implementing various
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* timestamps and timers independent of the IPA core clock rate. The
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* Qtimer is based on a 56-bit timestamp incremented at each tick of
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* a 19.2 MHz SoC crystal oscillator (XO clock).
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*
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* For IPA timestamps (tag, NAT, data path logging) a lower resolution
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* timestamp is achieved by shifting the Qtimer timestamp value right
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* some number of bits to produce the low-order bits of the coarser
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* granularity timestamp.
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*
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* For timers, a common timer clock is derived from the XO clock using
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* a divider (we use 192, to produce a 100kHz timer clock). From
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* this common clock, three "pulse generators" are used to produce
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* timer ticks at a configurable frequency. IPA timers (such as
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* those used for aggregation or head-of-line block handling) now
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* define their period based on one of these pulse generators.
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*/
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static void ipa_qtime_config(struct ipa *ipa)
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{
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u32 val;
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/* Timer clock divider must be disabled when we change the rate */
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iowrite32(0, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET);
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/* Set DPL time stamp resolution to use Qtime (instead of 1 msec) */
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val = u32_encode_bits(DPL_TIMESTAMP_SHIFT, DPL_TIMESTAMP_LSB_FMASK);
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val |= u32_encode_bits(1, DPL_TIMESTAMP_SEL_FMASK);
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/* Configure tag and NAT Qtime timestamp resolution as well */
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val |= u32_encode_bits(TAG_TIMESTAMP_SHIFT, TAG_TIMESTAMP_LSB_FMASK);
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val |= u32_encode_bits(NAT_TIMESTAMP_SHIFT, NAT_TIMESTAMP_LSB_FMASK);
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iowrite32(val, ipa->reg_virt + IPA_REG_QTIME_TIMESTAMP_CFG_OFFSET);
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/* Set granularity of pulse generators used for other timers */
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val = u32_encode_bits(IPA_GRAN_100_US, GRAN_0_FMASK);
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val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_1_FMASK);
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val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_2_FMASK);
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iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_PULSE_GRAN_CFG_OFFSET);
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/* Actual divider is 1 more than value supplied here */
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val = u32_encode_bits(IPA_XO_CLOCK_DIVIDER - 1, DIV_VALUE_FMASK);
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iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET);
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/* Divider value is set; re-enable the common timer clock divider */
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val |= u32_encode_bits(1, DIV_ENABLE_FMASK);
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iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET);
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}
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static void ipa_idle_indication_cfg(struct ipa *ipa,
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u32 enter_idle_debounce_thresh,
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bool const_non_idle_enable)
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{
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u32 offset;
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u32 val;
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val = u32_encode_bits(enter_idle_debounce_thresh,
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ENTER_IDLE_DEBOUNCE_THRESH_FMASK);
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if (const_non_idle_enable)
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val |= CONST_NON_IDLE_ENABLE_FMASK;
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offset = ipa_reg_idle_indication_cfg_offset(ipa->version);
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iowrite32(val, ipa->reg_virt + offset);
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}
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/**
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* ipa_hardware_dcd_config() - Enable dynamic clock division on IPA
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* @ipa: IPA pointer
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*
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* Configures when the IPA signals it is idle to the global clock
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* controller, which can respond by scalling down the clock to
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* save power.
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*/
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static void ipa_hardware_dcd_config(struct ipa *ipa)
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{
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/* Recommended values for IPA 3.5 and later according to IPA HPG */
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ipa_idle_indication_cfg(ipa, 256, false);
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}
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static void ipa_hardware_dcd_deconfig(struct ipa *ipa)
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{
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/* Power-on reset values */
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ipa_idle_indication_cfg(ipa, 0, true);
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}
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/**
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* ipa_hardware_config() - Primitive hardware initialization
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* @ipa: IPA pointer
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* @data: IPA configuration data
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*/
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static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data)
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{
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enum ipa_version version = ipa->version;
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u32 granularity;
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u32 val;
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/* IPA v4.5+ has no backward compatibility register */
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if (version < IPA_VERSION_4_5) {
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val = data->backward_compat;
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iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET);
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}
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/* Implement some hardware workarounds */
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if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5) {
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/* Enable open global clocks (not needed for IPA v4.5) */
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val = GLOBAL_FMASK;
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val |= GLOBAL_2X_CLK_FMASK;
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iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET);
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/* Disable PA mask to allow HOLB drop */
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val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET);
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val &= ~PA_MASK_EN_FMASK;
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iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET);
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}
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ipa_hardware_config_comp(ipa);
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/* Configure system bus limits */
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ipa_hardware_config_qsb(ipa, data);
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if (version < IPA_VERSION_4_5) {
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/* Configure aggregation timer granularity */
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granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY);
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val = u32_encode_bits(granularity, AGGR_GRANULARITY_FMASK);
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iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET);
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} else {
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ipa_qtime_config(ipa);
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}
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/* IPA v4.2 does not support hashed tables, so disable them */
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if (version == IPA_VERSION_4_2) {
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u32 offset = ipa_reg_filt_rout_hash_en_offset(version);
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|
iowrite32(0, ipa->reg_virt + offset);
|
|
}
|
|
|
|
/* Enable dynamic clock division */
|
|
ipa_hardware_dcd_config(ipa);
|
|
}
|
|
|
|
/**
|
|
* ipa_hardware_deconfig() - Inverse of ipa_hardware_config()
|
|
* @ipa: IPA pointer
|
|
*
|
|
* This restores the power-on reset values (even if they aren't different)
|
|
*/
|
|
static void ipa_hardware_deconfig(struct ipa *ipa)
|
|
{
|
|
/* Mostly we just leave things as we set them. */
|
|
ipa_hardware_dcd_deconfig(ipa);
|
|
}
|
|
|
|
/**
|
|
* ipa_config() - Configure IPA hardware
|
|
* @ipa: IPA pointer
|
|
* @data: IPA configuration data
|
|
*
|
|
* Perform initialization requiring IPA clock to be enabled.
|
|
*/
|
|
static int ipa_config(struct ipa *ipa, const struct ipa_data *data)
|
|
{
|
|
int ret;
|
|
|
|
/* Get a clock reference to allow initialization. This reference
|
|
* is held after initialization completes, and won't get dropped
|
|
* unless/until a system suspend request arrives.
|
|
*/
|
|
ipa_clock_get(ipa);
|
|
|
|
ipa_hardware_config(ipa, data);
|
|
|
|
ret = ipa_endpoint_config(ipa);
|
|
if (ret)
|
|
goto err_hardware_deconfig;
|
|
|
|
ret = ipa_mem_config(ipa);
|
|
if (ret)
|
|
goto err_endpoint_deconfig;
|
|
|
|
ipa_table_config(ipa); /* No deconfig required */
|
|
|
|
/* Assign resource limitation to each group; no deconfig required */
|
|
ret = ipa_resource_config(ipa, data->resource_data);
|
|
if (ret)
|
|
goto err_mem_deconfig;
|
|
|
|
ret = ipa_modem_config(ipa);
|
|
if (ret)
|
|
goto err_mem_deconfig;
|
|
|
|
return 0;
|
|
|
|
err_mem_deconfig:
|
|
ipa_mem_deconfig(ipa);
|
|
err_endpoint_deconfig:
|
|
ipa_endpoint_deconfig(ipa);
|
|
err_hardware_deconfig:
|
|
ipa_hardware_deconfig(ipa);
|
|
ipa_clock_put(ipa);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* ipa_deconfig() - Inverse of ipa_config()
|
|
* @ipa: IPA pointer
|
|
*/
|
|
static void ipa_deconfig(struct ipa *ipa)
|
|
{
|
|
ipa_modem_deconfig(ipa);
|
|
ipa_mem_deconfig(ipa);
|
|
ipa_endpoint_deconfig(ipa);
|
|
ipa_hardware_deconfig(ipa);
|
|
ipa_clock_put(ipa);
|
|
}
|
|
|
|
static int ipa_firmware_load(struct device *dev)
|
|
{
|
|
const struct firmware *fw;
|
|
struct device_node *node;
|
|
struct resource res;
|
|
phys_addr_t phys;
|
|
const char *path;
|
|
ssize_t size;
|
|
void *virt;
|
|
int ret;
|
|
|
|
node = of_parse_phandle(dev->of_node, "memory-region", 0);
|
|
if (!node) {
|
|
dev_err(dev, "DT error getting \"memory-region\" property\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = of_address_to_resource(node, 0, &res);
|
|
if (ret) {
|
|
dev_err(dev, "error %d getting \"memory-region\" resource\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
/* Use name from DTB if specified; use default for *any* error */
|
|
ret = of_property_read_string(dev->of_node, "firmware-name", &path);
|
|
if (ret) {
|
|
dev_dbg(dev, "error %d getting \"firmware-name\" resource\n",
|
|
ret);
|
|
path = IPA_FW_PATH_DEFAULT;
|
|
}
|
|
|
|
ret = request_firmware(&fw, path, dev);
|
|
if (ret) {
|
|
dev_err(dev, "error %d requesting \"%s\"\n", ret, path);
|
|
return ret;
|
|
}
|
|
|
|
phys = res.start;
|
|
size = (size_t)resource_size(&res);
|
|
virt = memremap(phys, size, MEMREMAP_WC);
|
|
if (!virt) {
|
|
dev_err(dev, "unable to remap firmware memory\n");
|
|
ret = -ENOMEM;
|
|
goto out_release_firmware;
|
|
}
|
|
|
|
ret = qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL);
|
|
if (ret)
|
|
dev_err(dev, "error %d loading \"%s\"\n", ret, path);
|
|
else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID)))
|
|
dev_err(dev, "error %d authenticating \"%s\"\n", ret, path);
|
|
|
|
memunmap(virt);
|
|
out_release_firmware:
|
|
release_firmware(fw);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct of_device_id ipa_match[] = {
|
|
{
|
|
.compatible = "qcom,sdm845-ipa",
|
|
.data = &ipa_data_v3_5_1,
|
|
},
|
|
{
|
|
.compatible = "qcom,sc7180-ipa",
|
|
.data = &ipa_data_v4_2,
|
|
},
|
|
{
|
|
.compatible = "qcom,sdx55-ipa",
|
|
.data = &ipa_data_v4_5,
|
|
},
|
|
{
|
|
.compatible = "qcom,sm8350-ipa",
|
|
.data = &ipa_data_v4_9,
|
|
},
|
|
{
|
|
.compatible = "qcom,sc7280-ipa",
|
|
.data = &ipa_data_v4_11,
|
|
},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ipa_match);
|
|
|
|
/* Check things that can be validated at build time. This just
|
|
* groups these things BUILD_BUG_ON() calls don't clutter the rest
|
|
* of the code.
|
|
* */
|
|
static void ipa_validate_build(void)
|
|
{
|
|
#ifdef IPA_VALIDATE
|
|
/* At one time we assumed a 64-bit build, allowing some do_div()
|
|
* calls to be replaced by simple division or modulo operations.
|
|
* We currently only perform divide and modulo operations on u32,
|
|
* u16, or size_t objects, and of those only size_t has any chance
|
|
* of being a 64-bit value. (It should be guaranteed 32 bits wide
|
|
* on a 32-bit build, but there is no harm in verifying that.)
|
|
*/
|
|
BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4);
|
|
|
|
/* Code assumes the EE ID for the AP is 0 (zeroed structure field) */
|
|
BUILD_BUG_ON(GSI_EE_AP != 0);
|
|
|
|
/* There's no point if we have no channels or event rings */
|
|
BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX);
|
|
BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX);
|
|
|
|
/* GSI hardware design limits */
|
|
BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32);
|
|
BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31);
|
|
|
|
/* The number of TREs in a transaction is limited by the channel's
|
|
* TLV FIFO size. A transaction structure uses 8-bit fields
|
|
* to represents the number of TREs it has allocated and used.
|
|
*/
|
|
BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX);
|
|
|
|
/* This is used as a divisor */
|
|
BUILD_BUG_ON(!IPA_AGGR_GRANULARITY);
|
|
|
|
/* Aggregation granularity value can't be 0, and must fit */
|
|
BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY));
|
|
BUILD_BUG_ON(ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY) >
|
|
field_max(AGGR_GRANULARITY_FMASK));
|
|
#endif /* IPA_VALIDATE */
|
|
}
|
|
|
|
/**
|
|
* ipa_probe() - IPA platform driver probe function
|
|
* @pdev: Platform device pointer
|
|
*
|
|
* Return: 0 if successful, or a negative error code (possibly
|
|
* EPROBE_DEFER)
|
|
*
|
|
* This is the main entry point for the IPA driver. Initialization proceeds
|
|
* in several stages:
|
|
* - The "init" stage involves activities that can be initialized without
|
|
* access to the IPA hardware.
|
|
* - The "config" stage requires the IPA clock to be active so IPA registers
|
|
* can be accessed, but does not require the use of IPA immediate commands.
|
|
* - The "setup" stage uses IPA immediate commands, and so requires the GSI
|
|
* layer to be initialized.
|
|
*
|
|
* A Boolean Device Tree "modem-init" property determines whether GSI
|
|
* initialization will be performed by the AP (Trust Zone) or the modem.
|
|
* If the AP does GSI initialization, the setup phase is entered after
|
|
* this has completed successfully. Otherwise the modem initializes
|
|
* the GSI layer and signals it has finished by sending an SMP2P interrupt
|
|
* to the AP; this triggers the start if IPA setup.
|
|
*/
|
|
static int ipa_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
const struct ipa_data *data;
|
|
struct ipa_clock *clock;
|
|
bool modem_init;
|
|
struct ipa *ipa;
|
|
int ret;
|
|
|
|
ipa_validate_build();
|
|
|
|
/* Get configuration data early; needed for clock initialization */
|
|
data = of_device_get_match_data(dev);
|
|
if (!data) {
|
|
/* This is really IPA_VALIDATE (should never happen) */
|
|
dev_err(dev, "matched hardware not supported\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* If we need Trust Zone, make sure it's available */
|
|
modem_init = of_property_read_bool(dev->of_node, "modem-init");
|
|
if (!modem_init)
|
|
if (!qcom_scm_is_available())
|
|
return -EPROBE_DEFER;
|
|
|
|
/* The clock and interconnects might not be ready when we're
|
|
* probed, so might return -EPROBE_DEFER.
|
|
*/
|
|
clock = ipa_clock_init(dev, data->clock_data);
|
|
if (IS_ERR(clock))
|
|
return PTR_ERR(clock);
|
|
|
|
/* No more EPROBE_DEFER. Allocate and initialize the IPA structure */
|
|
ipa = kzalloc(sizeof(*ipa), GFP_KERNEL);
|
|
if (!ipa) {
|
|
ret = -ENOMEM;
|
|
goto err_clock_exit;
|
|
}
|
|
|
|
ipa->pdev = pdev;
|
|
dev_set_drvdata(dev, ipa);
|
|
ipa->clock = clock;
|
|
ipa->version = data->version;
|
|
init_completion(&ipa->completion);
|
|
|
|
ret = ipa_reg_init(ipa);
|
|
if (ret)
|
|
goto err_kfree_ipa;
|
|
|
|
ret = ipa_mem_init(ipa, data->mem_data);
|
|
if (ret)
|
|
goto err_reg_exit;
|
|
|
|
ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count,
|
|
data->endpoint_data);
|
|
if (ret)
|
|
goto err_mem_exit;
|
|
|
|
/* Result is a non-zero mask of endpoints that support filtering */
|
|
ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count,
|
|
data->endpoint_data);
|
|
if (!ipa->filter_map) {
|
|
ret = -EINVAL;
|
|
goto err_gsi_exit;
|
|
}
|
|
|
|
ret = ipa_table_init(ipa);
|
|
if (ret)
|
|
goto err_endpoint_exit;
|
|
|
|
ret = ipa_modem_init(ipa, modem_init);
|
|
if (ret)
|
|
goto err_table_exit;
|
|
|
|
ret = ipa_config(ipa, data);
|
|
if (ret)
|
|
goto err_modem_exit;
|
|
|
|
dev_info(dev, "IPA driver initialized");
|
|
|
|
/* If the modem is doing early initialization, it will trigger a
|
|
* call to ipa_setup() call when it has finished. In that case
|
|
* we're done here.
|
|
*/
|
|
if (modem_init)
|
|
return 0;
|
|
|
|
/* Otherwise we need to load the firmware and have Trust Zone validate
|
|
* and install it. If that succeeds we can proceed with setup.
|
|
*/
|
|
ret = ipa_firmware_load(dev);
|
|
if (ret)
|
|
goto err_deconfig;
|
|
|
|
ret = ipa_setup(ipa);
|
|
if (ret)
|
|
goto err_deconfig;
|
|
|
|
return 0;
|
|
|
|
err_deconfig:
|
|
ipa_deconfig(ipa);
|
|
err_modem_exit:
|
|
ipa_modem_exit(ipa);
|
|
err_table_exit:
|
|
ipa_table_exit(ipa);
|
|
err_endpoint_exit:
|
|
ipa_endpoint_exit(ipa);
|
|
err_gsi_exit:
|
|
gsi_exit(&ipa->gsi);
|
|
err_mem_exit:
|
|
ipa_mem_exit(ipa);
|
|
err_reg_exit:
|
|
ipa_reg_exit(ipa);
|
|
err_kfree_ipa:
|
|
kfree(ipa);
|
|
err_clock_exit:
|
|
ipa_clock_exit(clock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ipa_remove(struct platform_device *pdev)
|
|
{
|
|
struct ipa *ipa = dev_get_drvdata(&pdev->dev);
|
|
struct ipa_clock *clock = ipa->clock;
|
|
int ret;
|
|
|
|
if (ipa->setup_complete) {
|
|
ret = ipa_modem_stop(ipa);
|
|
/* If starting or stopping is in progress, try once more */
|
|
if (ret == -EBUSY) {
|
|
usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);
|
|
ret = ipa_modem_stop(ipa);
|
|
}
|
|
if (ret)
|
|
return ret;
|
|
|
|
ipa_teardown(ipa);
|
|
}
|
|
|
|
ipa_deconfig(ipa);
|
|
ipa_modem_exit(ipa);
|
|
ipa_table_exit(ipa);
|
|
ipa_endpoint_exit(ipa);
|
|
gsi_exit(&ipa->gsi);
|
|
ipa_mem_exit(ipa);
|
|
ipa_reg_exit(ipa);
|
|
kfree(ipa);
|
|
ipa_clock_exit(clock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ipa_shutdown(struct platform_device *pdev)
|
|
{
|
|
int ret;
|
|
|
|
ret = ipa_remove(pdev);
|
|
if (ret)
|
|
dev_err(&pdev->dev, "shutdown: remove returned %d\n", ret);
|
|
}
|
|
|
|
/**
|
|
* ipa_suspend() - Power management system suspend callback
|
|
* @dev: IPA device structure
|
|
*
|
|
* Return: Always returns zero
|
|
*
|
|
* Called by the PM framework when a system suspend operation is invoked.
|
|
* Suspends endpoints and releases the clock reference held to keep
|
|
* the IPA clock running until this point.
|
|
*/
|
|
static int ipa_suspend(struct device *dev)
|
|
{
|
|
struct ipa *ipa = dev_get_drvdata(dev);
|
|
|
|
/* When a suspended RX endpoint has a packet ready to receive, we
|
|
* get an IPA SUSPEND interrupt. We trigger a system resume in
|
|
* that case, but only on the first such interrupt since suspend.
|
|
*/
|
|
__clear_bit(IPA_FLAG_RESUMED, ipa->flags);
|
|
|
|
ipa_endpoint_suspend(ipa);
|
|
|
|
ipa_clock_put(ipa);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* ipa_resume() - Power management system resume callback
|
|
* @dev: IPA device structure
|
|
*
|
|
* Return: Always returns 0
|
|
*
|
|
* Called by the PM framework when a system resume operation is invoked.
|
|
* Takes an IPA clock reference to keep the clock running until suspend,
|
|
* and resumes endpoints.
|
|
*/
|
|
static int ipa_resume(struct device *dev)
|
|
{
|
|
struct ipa *ipa = dev_get_drvdata(dev);
|
|
|
|
/* This clock reference will keep the IPA out of suspend
|
|
* until we get a power management suspend request.
|
|
*/
|
|
ipa_clock_get(ipa);
|
|
|
|
ipa_endpoint_resume(ipa);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops ipa_pm_ops = {
|
|
.suspend = ipa_suspend,
|
|
.resume = ipa_resume,
|
|
};
|
|
|
|
static struct platform_driver ipa_driver = {
|
|
.probe = ipa_probe,
|
|
.remove = ipa_remove,
|
|
.shutdown = ipa_shutdown,
|
|
.driver = {
|
|
.name = "ipa",
|
|
.pm = &ipa_pm_ops,
|
|
.of_match_table = ipa_match,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(ipa_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver");
|