linux/drivers/cxl
Dan Williams 7592d935b7 cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem
tl;dr: Clean up an unnecessary export and enable cxl_test.

An RCD (Restricted CXL Device), in contrast to a typical CXL device in
a VH topology, obtains its component registers from the bottom half of
the associated CXL host bridge RCRB (Root Complex Register Block). In
turn this means that cxl_rcrb_to_component() needs to be called from
devm_cxl_add_endpoint().

Presently devm_cxl_add_endpoint() is part of the CXL core, but the only
user is the CXL mem module. Move it from cxl_core to cxl_mem to not only
get rid of an unnecessary export, but to also enable its call out to
cxl_rcrb_to_component(), in a subsequent patch, to be mocked by
cxl_test. Recall that cxl_test can only mock exported symbols, and since
cxl_rcrb_to_component() is itself inside the core, all callers must be
outside of cxl_core to allow cxl_test to mock it.

Reviewed-by: Robert Richter <rrichter@amd.com>
Link: https://lore.kernel.org/r/166993045072.1882361.13944923741276843683.stgit@dwillia2-xfh.jf.intel.com
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-12-05 10:32:26 -08:00
..
core cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem 2022-12-05 10:32:26 -08:00
acpi.c cxl/acpi: Extract component registers of restricted hosts from RCRB 2022-12-03 00:40:29 -08:00
cxl.h cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem 2022-12-05 10:32:26 -08:00
cxlmem.h cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem 2022-12-05 10:32:26 -08:00
cxlpci.h cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00
Kconfig cxl/region: Allocate HPA capacity to regions 2022-07-25 12:18:06 -07:00
Makefile PM: CXL: Disable suspend 2022-04-22 16:09:42 -07:00
mem.c cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem 2022-12-05 10:32:26 -08:00
pci.c cxl/pmem: Refactor nvdimm device registration, delete the workqueue 2022-12-02 23:07:22 -08:00
pmem.c cxl/pmem: Remove the cxl_pmem_wq and related infrastructure 2022-12-02 23:07:22 -08:00
port.c cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00