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The Exynos Chip ID driver on Exynos SoCs has so far only informational purpose - to expose the SoC device in sysfs. No other drivers depend on it so there is really no benefit of initializing it early. The code would be the most flexible if converted to a regular driver. However there is already another driver - Exynos ASV (Adaptive Supply Voltage) - which binds to the device node of Chip ID. The solution is to convert the Exynos Chip ID to a built in driver and merge the Exynos ASV into it. This has several benefits: 1. Although the Exynos ASV driver binds to a device node present in all Exynos DTS (generic compatible), it fails to probe except on the supported ones (only Exynos5422). This means that the regular boot process has a planned/normal device probe failure. Merging the ASV into Chip ID will remove this probe failure because the final driver will always bind, just with disabled ASV features. 2. Allows to use dev_info() as the SoC bus is present (since core_initcall). 3. Could speed things up because of execution of Chip ID code in a SMP environment (after bringing up secondary CPUs, unlike early_initcall), This reduces the amount of work to be done early, when the kernel has to bring up critical devices. 5. Makes the Chip ID code defer-probe friendly, Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201207190517.262051-5-krzk@kernel.org Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
161 lines
3.5 KiB
C
161 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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* Copyright (c) 2020 Krzysztof Kozlowski <krzk@kernel.org>
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* Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
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* Author: Krzysztof Kozlowski <krzk@kernel.org>
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*
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* Samsung Exynos SoC Adaptive Supply Voltage support
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*/
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#include <linux/cpu.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/of.h>
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#include <linux/pm_opp.h>
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#include <linux/regmap.h>
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#include <linux/soc/samsung/exynos-chipid.h>
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#include "exynos-asv.h"
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#include "exynos5422-asv.h"
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#define MHZ 1000000U
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static int exynos_asv_update_cpu_opps(struct exynos_asv *asv,
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struct device *cpu)
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{
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struct exynos_asv_subsys *subsys = NULL;
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struct dev_pm_opp *opp;
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unsigned int opp_freq;
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int i;
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for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) {
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if (of_device_is_compatible(cpu->of_node,
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asv->subsys[i].cpu_dt_compat)) {
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subsys = &asv->subsys[i];
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break;
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}
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}
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if (!subsys)
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return -EINVAL;
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for (i = 0; i < subsys->table.num_rows; i++) {
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unsigned int new_volt, volt;
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int ret;
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opp_freq = exynos_asv_opp_get_frequency(subsys, i);
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opp = dev_pm_opp_find_freq_exact(cpu, opp_freq * MHZ, true);
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if (IS_ERR(opp)) {
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dev_info(asv->dev, "cpu%d opp%d, freq: %u missing\n",
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cpu->id, i, opp_freq);
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continue;
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}
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volt = dev_pm_opp_get_voltage(opp);
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new_volt = asv->opp_get_voltage(subsys, i, volt);
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dev_pm_opp_put(opp);
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if (new_volt == volt)
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continue;
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ret = dev_pm_opp_adjust_voltage(cpu, opp_freq * MHZ,
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new_volt, new_volt, new_volt);
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if (ret < 0)
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dev_err(asv->dev,
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"Failed to adjust OPP %u Hz/%u uV for cpu%d\n",
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opp_freq, new_volt, cpu->id);
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else
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dev_dbg(asv->dev,
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"Adjusted OPP %u Hz/%u -> %u uV, cpu%d\n",
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opp_freq, volt, new_volt, cpu->id);
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}
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return 0;
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}
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static int exynos_asv_update_opps(struct exynos_asv *asv)
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{
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struct opp_table *last_opp_table = NULL;
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struct device *cpu;
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int ret, cpuid;
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for_each_possible_cpu(cpuid) {
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struct opp_table *opp_table;
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cpu = get_cpu_device(cpuid);
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if (!cpu)
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continue;
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opp_table = dev_pm_opp_get_opp_table(cpu);
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if (IS_ERR(opp_table))
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continue;
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if (!last_opp_table || opp_table != last_opp_table) {
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last_opp_table = opp_table;
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ret = exynos_asv_update_cpu_opps(asv, cpu);
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if (ret < 0)
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dev_err(asv->dev, "Couldn't udate OPPs for cpu%d\n",
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cpuid);
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}
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dev_pm_opp_put_opp_table(opp_table);
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}
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return 0;
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}
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int exynos_asv_init(struct device *dev, struct regmap *regmap)
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{
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int (*probe_func)(struct exynos_asv *asv);
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struct exynos_asv *asv;
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struct device *cpu_dev;
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u32 product_id = 0;
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int ret, i;
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asv = devm_kzalloc(dev, sizeof(*asv), GFP_KERNEL);
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if (!asv)
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return -ENOMEM;
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asv->chipid_regmap = regmap;
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asv->dev = dev;
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ret = regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PRO_ID,
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&product_id);
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if (ret < 0) {
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dev_err(dev, "Cannot read revision from ChipID: %d\n", ret);
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return -ENODEV;
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}
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switch (product_id & EXYNOS_MASK) {
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case 0xE5422000:
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probe_func = exynos5422_asv_init;
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break;
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default:
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dev_dbg(dev, "No ASV support for this SoC\n");
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devm_kfree(dev, asv);
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return 0;
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}
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cpu_dev = get_cpu_device(0);
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ret = dev_pm_opp_get_opp_count(cpu_dev);
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if (ret < 0)
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return -EPROBE_DEFER;
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ret = of_property_read_u32(dev->of_node, "samsung,asv-bin",
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&asv->of_bin);
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if (ret < 0)
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asv->of_bin = -EINVAL;
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for (i = 0; i < ARRAY_SIZE(asv->subsys); i++)
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asv->subsys[i].asv = asv;
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ret = probe_func(asv);
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if (ret < 0)
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return ret;
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return exynos_asv_update_opps(asv);
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}
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