mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-27 04:54:41 +08:00
ff9704538e
This patch affects modules rtl8192ce, rtl8192cu, and rtl8192com. The following checkpatch exceptions are also fixed: CHECK: No space is necessary after a cast #237: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c:90: + (u8 *) (&rfstate)); CHECK: No space is necessary after a cast #744: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c:329: + pwr_val[i] = (u8) ((writeval & (0x7f << CHECK: No space is necessary after a cast #784: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c:365: + (u8) writeval); CHECK: spaces preferred around that '/' (ctx:VxV) #963: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:513: + txqpageunit = txqpagenum/outepnum; ^ CHECK: Unnecessary parentheses around 'outepnum > 1' #975: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:521: + if ((outepnum > 1) && (txqremaininpage)) CHECK: Alignment should match open parenthesis #1059: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:617: +static void _rtl92cu_init_chipn_two_out_ep_priority(struct ieee80211_hw *hw, bool wmm_enable, ERROR: "foo * bar" should be "foo *bar" #1940: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c:591: +void rtl92cu_fill_fake_txdesc(struct ieee80211_hw *hw, u8 *pdesc, Note that not all checkpatch exceptions are addressed. Those will be handled in later patches. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
46 lines
1.7 KiB
C
46 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/* Copyright(c) 2009-2012 Realtek Corporation.*/
|
|
|
|
#ifndef __RTL92CU_TABLE__H_
|
|
#define __RTL92CU_TABLE__H_
|
|
|
|
#include <linux/types.h>
|
|
|
|
#define RTL8192CUPHY_REG_2TARRAY_LENGTH 374
|
|
extern u32 RTL8192CUPHY_REG_2TARRAY[RTL8192CUPHY_REG_2TARRAY_LENGTH];
|
|
#define RTL8192CUPHY_REG_1TARRAY_LENGTH 374
|
|
extern u32 RTL8192CUPHY_REG_1TARRAY[RTL8192CUPHY_REG_1TARRAY_LENGTH];
|
|
|
|
#define RTL8192CUPHY_REG_ARRAY_PGLENGTH 336
|
|
extern u32 RTL8192CUPHY_REG_ARRAY_PG[RTL8192CUPHY_REG_ARRAY_PGLENGTH];
|
|
|
|
#define RTL8192CURADIOA_2TARRAYLENGTH 282
|
|
extern u32 RTL8192CURADIOA_2TARRAY[RTL8192CURADIOA_2TARRAYLENGTH];
|
|
#define RTL8192CURADIOB_2TARRAYLENGTH 78
|
|
extern u32 RTL8192CU_RADIOB_2TARRAY[RTL8192CURADIOB_2TARRAYLENGTH];
|
|
#define RTL8192CURADIOA_1TARRAYLENGTH 282
|
|
extern u32 RTL8192CU_RADIOA_1TARRAY[RTL8192CURADIOA_1TARRAYLENGTH];
|
|
#define RTL8192CURADIOB_1TARRAYLENGTH 1
|
|
extern u32 RTL8192CU_RADIOB_1TARRAY[RTL8192CURADIOB_1TARRAYLENGTH];
|
|
|
|
#define RTL8192CUMAC_2T_ARRAYLENGTH 172
|
|
extern u32 RTL8192CUMAC_2T_ARRAY[RTL8192CUMAC_2T_ARRAYLENGTH];
|
|
|
|
#define RTL8192CUAGCTAB_2TARRAYLENGTH 320
|
|
extern u32 RTL8192CUAGCTAB_2TARRAY[RTL8192CUAGCTAB_2TARRAYLENGTH];
|
|
#define RTL8192CUAGCTAB_1TARRAYLENGTH 320
|
|
extern u32 RTL8192CUAGCTAB_1TARRAY[RTL8192CUAGCTAB_1TARRAYLENGTH];
|
|
|
|
#define RTL8192CUPHY_REG_1T_HPARRAYLENGTH 378
|
|
extern u32 RTL8192CUPHY_REG_1T_HPARRAY[RTL8192CUPHY_REG_1T_HPARRAYLENGTH];
|
|
|
|
#define RTL8192CUPHY_REG_ARRAY_PG_HPLENGTH 336
|
|
extern u32 RTL8192CUPHY_REG_ARRAY_PG_HP[RTL8192CUPHY_REG_ARRAY_PG_HPLENGTH];
|
|
|
|
#define RTL8192CURADIOA_1T_HPARRAYLENGTH 282
|
|
extern u32 RTL8192CURADIOA_1T_HPARRAY[RTL8192CURADIOA_1T_HPARRAYLENGTH];
|
|
#define RTL8192CUAGCTAB_1T_HPARRAYLENGTH 320
|
|
extern u32 RTL8192CUAGCTAB_1T_HPARRAY[RTL8192CUAGCTAB_1T_HPARRAYLENGTH];
|
|
|
|
#endif
|