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74689ddfb7
On tgl/bxt/glk the cdclk bypass frequency depends on the PLL
reference clock. So let's read out the ref clock before we
try to compute the bypass clock.
Cc: Matt Roper <matthew.d.roper@intel.com>
Fixes:
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drm | ||
host1x | ||
ipu-v3 | ||
vga | ||
Makefile |