mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-20 02:34:23 +08:00
68c5ed592f
Fixes for the DMA transfer mode of the driver to try and improve the state of the code: - Ensure that dma_complete is set during the end of the command phase so that transfers do not stall awaiting the completion - Update the DMA debugging to provide a bit more useful information such as how many DMA descriptors where not processed and print the DMA addresses in hexadecimal. - Fix the DMA channel request code to actually request DMA for the S3CMCI block instead of whatever '0' signified. - Add fallback to PIO if we cannot get the DMA channel, as many of the devices with this block only have a limited number of DMA channels. - Only try and claim and free the DMA channel if we are trying to use it. This improves the driver DMA code to the point where it can now identify a card and read the partition table. However the DMA can still stall when trying to move data between the host and memory. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
83 lines
1.6 KiB
C
83 lines
1.6 KiB
C
/*
|
|
* linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
|
|
*
|
|
* Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
enum s3cmci_waitfor {
|
|
COMPLETION_NONE,
|
|
COMPLETION_FINALIZE,
|
|
COMPLETION_CMDSENT,
|
|
COMPLETION_RSPFIN,
|
|
COMPLETION_XFERFINISH,
|
|
COMPLETION_XFERFINISH_RSPFIN,
|
|
};
|
|
|
|
struct s3cmci_host {
|
|
struct platform_device *pdev;
|
|
struct s3c24xx_mci_pdata *pdata;
|
|
struct mmc_host *mmc;
|
|
struct resource *mem;
|
|
struct clk *clk;
|
|
void __iomem *base;
|
|
int irq;
|
|
int irq_cd;
|
|
int dma;
|
|
|
|
unsigned long clk_rate;
|
|
unsigned long clk_div;
|
|
unsigned long real_rate;
|
|
u8 prescaler;
|
|
|
|
int is2440;
|
|
unsigned sdiimsk;
|
|
unsigned sdidata;
|
|
int dodma;
|
|
int dmatogo;
|
|
|
|
bool irq_disabled;
|
|
bool irq_enabled;
|
|
bool irq_state;
|
|
int sdio_irqen;
|
|
|
|
struct mmc_request *mrq;
|
|
int cmd_is_stop;
|
|
|
|
spinlock_t complete_lock;
|
|
enum s3cmci_waitfor complete_what;
|
|
|
|
int dma_complete;
|
|
|
|
u32 pio_sgptr;
|
|
u32 pio_bytes;
|
|
u32 pio_count;
|
|
u32 *pio_ptr;
|
|
#define XFER_NONE 0
|
|
#define XFER_READ 1
|
|
#define XFER_WRITE 2
|
|
u32 pio_active;
|
|
|
|
int bus_width;
|
|
|
|
char dbgmsg_cmd[301];
|
|
char dbgmsg_dat[301];
|
|
char *status;
|
|
|
|
unsigned int ccnt, dcnt;
|
|
struct tasklet_struct pio_tasklet;
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
struct dentry *debug_root;
|
|
struct dentry *debug_state;
|
|
struct dentry *debug_regs;
|
|
#endif
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
struct notifier_block freq_transition;
|
|
#endif
|
|
};
|