Trek 73d8e6c7b8 drm/amdgpu: Check for valid number of registers to read ... Do not try to allocate any amount of memory requested by the user. Instead limit it to 128 registers. Actually the longest series of consecutive allowed registers are 48, mmGB_TILE_MODE0-31 and mmGB_MACROTILE_MODE0-15 (0x2644-0x2673). Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111273 Signed-off-by: Trek <trek00@inbox.ru> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-09-17 14:37:45 -05:00
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drm	drm/amdgpu: Check for valid number of registers to read	2019-09-17 14:37:45 -05:00
host1x	drm/tegra: Changes for v5.3-rc1	2019-06-25 12:59:43 +10:00
ipu-v3	gpu: ipu-v3: image-convert: only sample into the next tile if necessary	2019-08-19 16:25:30 +02:00
vga	topic/remove-fbcon-notifiers:	2019-06-26 12:26:34 +02:00
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