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The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other SoC+FPGA combinations. Instead of having to describe all Cyclone5 common nodes in every board specific dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the Development Kit. [Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
41 lines
1.1 KiB
Plaintext
41 lines
1.1 KiB
Plaintext
/*
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* Copyright (C) 2012 Altera Corporation <www.altera.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/include/ "socfpga_cyclone5.dtsi"
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/ {
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model = "Altera SOCFPGA Cyclone V SoC Development Kit";
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compatible = "altr,socfpga-cyclone5", "altr,socfpga";
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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memory {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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aliases {
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/* this allow the ethaddr uboot environmnet variable contents
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* to be added to the gmac1 device tree blob.
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*/
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ethernet0 = &gmac1;
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};
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};
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