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7361fac046
vmlinux.o: warning: objtool: pv_ops[2]: xen_set_debugreg vmlinux.o: warning: objtool: pv_ops[2]: native_set_debugreg vmlinux.o: warning: objtool: exc_debug()+0x3b: call to pv_ops[2]() leaves .noinstr.text section Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Juergen Gross <jgross@suse.com> Link: https://lore.kernel.org/r/20210624095148.687755639@infradead.org
1475 lines
35 KiB
C
1475 lines
35 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Core of Xen paravirt_ops implementation.
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*
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* This file contains the xen_paravirt_ops structure itself, and the
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* implementations for:
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* - privileged instructions
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* - interrupt flags
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* - segment operations
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* - booting and setup
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*
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* Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
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*/
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#include <linux/cpu.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/preempt.h>
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#include <linux/hardirq.h>
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#include <linux/percpu.h>
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#include <linux/delay.h>
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#include <linux/start_kernel.h>
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#include <linux/sched.h>
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#include <linux/kprobes.h>
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#include <linux/memblock.h>
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#include <linux/export.h>
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#include <linux/mm.h>
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#include <linux/page-flags.h>
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#include <linux/highmem.h>
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#include <linux/console.h>
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#include <linux/pci.h>
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#include <linux/gfp.h>
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#include <linux/edd.h>
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#include <linux/objtool.h>
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#include <xen/xen.h>
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#include <xen/events.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/version.h>
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#include <xen/interface/physdev.h>
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#include <xen/interface/vcpu.h>
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#include <xen/interface/memory.h>
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#include <xen/interface/nmi.h>
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#include <xen/interface/xen-mca.h>
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#include <xen/features.h>
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#include <xen/page.h>
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#include <xen/hvc-console.h>
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#include <xen/acpi.h>
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#include <asm/paravirt.h>
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#include <asm/apic.h>
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#include <asm/page.h>
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#include <asm/xen/pci.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include <asm/xen/cpuid.h>
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#include <asm/fixmap.h>
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#include <asm/processor.h>
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#include <asm/proto.h>
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#include <asm/msr-index.h>
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#include <asm/traps.h>
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#include <asm/setup.h>
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#include <asm/desc.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/reboot.h>
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#include <asm/stackprotector.h>
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#include <asm/hypervisor.h>
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#include <asm/mach_traps.h>
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#include <asm/mwait.h>
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#include <asm/pci_x86.h>
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#include <asm/cpu.h>
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#ifdef CONFIG_X86_IOPL_IOPERM
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#include <asm/io_bitmap.h>
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#endif
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#ifdef CONFIG_ACPI
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#include <linux/acpi.h>
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#include <asm/acpi.h>
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#include <acpi/pdc_intel.h>
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#include <acpi/processor.h>
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#include <xen/interface/platform.h>
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#endif
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#include "xen-ops.h"
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#include "mmu.h"
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#include "smp.h"
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#include "multicalls.h"
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#include "pmu.h"
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#include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
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void *xen_initial_gdt;
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static int xen_cpu_up_prepare_pv(unsigned int cpu);
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static int xen_cpu_dead_pv(unsigned int cpu);
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struct tls_descs {
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struct desc_struct desc[3];
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};
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/*
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* Updating the 3 TLS descriptors in the GDT on every task switch is
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* surprisingly expensive so we avoid updating them if they haven't
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* changed. Since Xen writes different descriptors than the one
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* passed in the update_descriptor hypercall we keep shadow copies to
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* compare against.
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*/
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static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
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static void __init xen_banner(void)
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{
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unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
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struct xen_extraversion extra;
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HYPERVISOR_xen_version(XENVER_extraversion, &extra);
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pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
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pr_info("Xen version: %d.%d%s (preserve-AD)\n",
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version >> 16, version & 0xffff, extra.extraversion);
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}
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static void __init xen_pv_init_platform(void)
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{
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populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
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set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
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HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
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/* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
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xen_vcpu_info_reset(0);
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/* pvclock is in shared info area */
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xen_init_time_ops();
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}
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static void __init xen_pv_guest_late_init(void)
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{
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#ifndef CONFIG_SMP
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/* Setup shared vcpu info for non-smp configurations */
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xen_setup_vcpu_info_placement();
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#endif
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}
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/* Check if running on Xen version (major, minor) or later */
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bool
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xen_running_on_version_or_later(unsigned int major, unsigned int minor)
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{
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unsigned int version;
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if (!xen_domain())
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return false;
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version = HYPERVISOR_xen_version(XENVER_version, NULL);
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if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
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((version >> 16) > major))
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return true;
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return false;
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}
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static __read_mostly unsigned int cpuid_leaf5_ecx_val;
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static __read_mostly unsigned int cpuid_leaf5_edx_val;
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static void xen_cpuid(unsigned int *ax, unsigned int *bx,
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unsigned int *cx, unsigned int *dx)
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{
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unsigned maskebx = ~0;
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/*
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* Mask out inconvenient features, to try and disable as many
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* unsupported kernel subsystems as possible.
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*/
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switch (*ax) {
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case CPUID_MWAIT_LEAF:
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/* Synthesize the values.. */
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*ax = 0;
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*bx = 0;
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*cx = cpuid_leaf5_ecx_val;
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*dx = cpuid_leaf5_edx_val;
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return;
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case 0xb:
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/* Suppress extended topology stuff */
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maskebx = 0;
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break;
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}
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asm(XEN_EMULATE_PREFIX "cpuid"
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: "=a" (*ax),
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"=b" (*bx),
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"=c" (*cx),
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"=d" (*dx)
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: "0" (*ax), "2" (*cx));
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*bx &= maskebx;
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}
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STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
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static bool __init xen_check_mwait(void)
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{
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#ifdef CONFIG_ACPI
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struct xen_platform_op op = {
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.cmd = XENPF_set_processor_pminfo,
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.u.set_pminfo.id = -1,
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.u.set_pminfo.type = XEN_PM_PDC,
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};
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uint32_t buf[3];
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unsigned int ax, bx, cx, dx;
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unsigned int mwait_mask;
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/* We need to determine whether it is OK to expose the MWAIT
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* capability to the kernel to harvest deeper than C3 states from ACPI
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* _CST using the processor_harvest_xen.c module. For this to work, we
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* need to gather the MWAIT_LEAF values (which the cstate.c code
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* checks against). The hypervisor won't expose the MWAIT flag because
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* it would break backwards compatibility; so we will find out directly
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* from the hardware and hypercall.
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*/
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if (!xen_initial_domain())
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return false;
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/*
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* When running under platform earlier than Xen4.2, do not expose
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* mwait, to avoid the risk of loading native acpi pad driver
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*/
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if (!xen_running_on_version_or_later(4, 2))
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return false;
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ax = 1;
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cx = 0;
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native_cpuid(&ax, &bx, &cx, &dx);
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mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
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(1 << (X86_FEATURE_MWAIT % 32));
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if ((cx & mwait_mask) != mwait_mask)
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return false;
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/* We need to emulate the MWAIT_LEAF and for that we need both
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* ecx and edx. The hypercall provides only partial information.
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*/
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ax = CPUID_MWAIT_LEAF;
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bx = 0;
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cx = 0;
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dx = 0;
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native_cpuid(&ax, &bx, &cx, &dx);
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/* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
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* don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
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*/
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buf[0] = ACPI_PDC_REVISION_ID;
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buf[1] = 1;
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buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
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set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
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if ((HYPERVISOR_platform_op(&op) == 0) &&
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(buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
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cpuid_leaf5_ecx_val = cx;
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cpuid_leaf5_edx_val = dx;
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}
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return true;
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#else
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return false;
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#endif
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}
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static bool __init xen_check_xsave(void)
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{
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unsigned int cx, xsave_mask;
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cx = cpuid_ecx(1);
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xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
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(1 << (X86_FEATURE_OSXSAVE % 32));
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/* Xen will set CR4.OSXSAVE if supported and not disabled by force */
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return (cx & xsave_mask) == xsave_mask;
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}
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static void __init xen_init_capabilities(void)
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{
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setup_force_cpu_cap(X86_FEATURE_XENPV);
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setup_clear_cpu_cap(X86_FEATURE_DCA);
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setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
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setup_clear_cpu_cap(X86_FEATURE_MTRR);
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setup_clear_cpu_cap(X86_FEATURE_ACC);
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setup_clear_cpu_cap(X86_FEATURE_X2APIC);
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setup_clear_cpu_cap(X86_FEATURE_SME);
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/*
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* Xen PV would need some work to support PCID: CR3 handling as well
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* as xen_flush_tlb_others() would need updating.
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*/
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setup_clear_cpu_cap(X86_FEATURE_PCID);
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if (!xen_initial_domain())
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setup_clear_cpu_cap(X86_FEATURE_ACPI);
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if (xen_check_mwait())
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setup_force_cpu_cap(X86_FEATURE_MWAIT);
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else
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setup_clear_cpu_cap(X86_FEATURE_MWAIT);
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if (!xen_check_xsave()) {
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setup_clear_cpu_cap(X86_FEATURE_XSAVE);
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setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
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}
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}
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static noinstr void xen_set_debugreg(int reg, unsigned long val)
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{
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HYPERVISOR_set_debugreg(reg, val);
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}
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static noinstr unsigned long xen_get_debugreg(int reg)
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{
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return HYPERVISOR_get_debugreg(reg);
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}
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static void xen_end_context_switch(struct task_struct *next)
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{
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xen_mc_flush();
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paravirt_end_context_switch(next);
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}
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static unsigned long xen_store_tr(void)
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{
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return 0;
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}
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/*
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* Set the page permissions for a particular virtual address. If the
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* address is a vmalloc mapping (or other non-linear mapping), then
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* find the linear mapping of the page and also set its protections to
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* match.
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*/
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static void set_aliased_prot(void *v, pgprot_t prot)
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{
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int level;
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pte_t *ptep;
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pte_t pte;
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unsigned long pfn;
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unsigned char dummy;
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void *va;
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ptep = lookup_address((unsigned long)v, &level);
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BUG_ON(ptep == NULL);
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pfn = pte_pfn(*ptep);
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pte = pfn_pte(pfn, prot);
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/*
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* Careful: update_va_mapping() will fail if the virtual address
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* we're poking isn't populated in the page tables. We don't
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* need to worry about the direct map (that's always in the page
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* tables), but we need to be careful about vmap space. In
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* particular, the top level page table can lazily propagate
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* entries between processes, so if we've switched mms since we
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* vmapped the target in the first place, we might not have the
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* top-level page table entry populated.
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*
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* We disable preemption because we want the same mm active when
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* we probe the target and when we issue the hypercall. We'll
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* have the same nominal mm, but if we're a kernel thread, lazy
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* mm dropping could change our pgd.
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*
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* Out of an abundance of caution, this uses __get_user() to fault
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* in the target address just in case there's some obscure case
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* in which the target address isn't readable.
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*/
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preempt_disable();
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copy_from_kernel_nofault(&dummy, v, 1);
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if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
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BUG();
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va = __va(PFN_PHYS(pfn));
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if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
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BUG();
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preempt_enable();
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}
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static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
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{
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const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
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int i;
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/*
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* We need to mark the all aliases of the LDT pages RO. We
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* don't need to call vm_flush_aliases(), though, since that's
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* only responsible for flushing aliases out the TLBs, not the
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* page tables, and Xen will flush the TLB for us if needed.
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*
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* To avoid confusing future readers: none of this is necessary
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* to load the LDT. The hypervisor only checks this when the
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* LDT is faulted in due to subsequent descriptor access.
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*/
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for (i = 0; i < entries; i += entries_per_page)
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set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
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}
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static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
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{
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const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
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int i;
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for (i = 0; i < entries; i += entries_per_page)
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set_aliased_prot(ldt + i, PAGE_KERNEL);
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}
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static void xen_set_ldt(const void *addr, unsigned entries)
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{
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struct mmuext_op *op;
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struct multicall_space mcs = xen_mc_entry(sizeof(*op));
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trace_xen_cpu_set_ldt(addr, entries);
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op = mcs.args;
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op->cmd = MMUEXT_SET_LDT;
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op->arg1.linear_addr = (unsigned long)addr;
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op->arg2.nr_ents = entries;
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MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
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xen_mc_issue(PARAVIRT_LAZY_CPU);
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}
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static void xen_load_gdt(const struct desc_ptr *dtr)
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{
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unsigned long va = dtr->address;
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unsigned int size = dtr->size + 1;
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unsigned long pfn, mfn;
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int level;
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pte_t *ptep;
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void *virt;
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/* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
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BUG_ON(size > PAGE_SIZE);
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BUG_ON(va & ~PAGE_MASK);
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/*
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* The GDT is per-cpu and is in the percpu data area.
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* That can be virtually mapped, so we need to do a
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* page-walk to get the underlying MFN for the
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* hypercall. The page can also be in the kernel's
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* linear range, so we need to RO that mapping too.
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*/
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ptep = lookup_address(va, &level);
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BUG_ON(ptep == NULL);
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pfn = pte_pfn(*ptep);
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mfn = pfn_to_mfn(pfn);
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virt = __va(PFN_PHYS(pfn));
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make_lowmem_page_readonly((void *)va);
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make_lowmem_page_readonly(virt);
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if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
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BUG();
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}
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/*
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* load_gdt for early boot, when the gdt is only mapped once
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*/
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static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
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{
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unsigned long va = dtr->address;
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unsigned int size = dtr->size + 1;
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unsigned long pfn, mfn;
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pte_t pte;
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/* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
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BUG_ON(size > PAGE_SIZE);
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BUG_ON(va & ~PAGE_MASK);
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pfn = virt_to_pfn(va);
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mfn = pfn_to_mfn(pfn);
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pte = pfn_pte(pfn, PAGE_KERNEL_RO);
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|
if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
|
|
BUG();
|
|
|
|
if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
|
|
BUG();
|
|
}
|
|
|
|
static inline bool desc_equal(const struct desc_struct *d1,
|
|
const struct desc_struct *d2)
|
|
{
|
|
return !memcmp(d1, d2, sizeof(*d1));
|
|
}
|
|
|
|
static void load_TLS_descriptor(struct thread_struct *t,
|
|
unsigned int cpu, unsigned int i)
|
|
{
|
|
struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
|
|
struct desc_struct *gdt;
|
|
xmaddr_t maddr;
|
|
struct multicall_space mc;
|
|
|
|
if (desc_equal(shadow, &t->tls_array[i]))
|
|
return;
|
|
|
|
*shadow = t->tls_array[i];
|
|
|
|
gdt = get_cpu_gdt_rw(cpu);
|
|
maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
|
|
mc = __xen_mc_entry(0);
|
|
|
|
MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
|
|
}
|
|
|
|
static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
|
|
{
|
|
/*
|
|
* In lazy mode we need to zero %fs, otherwise we may get an
|
|
* exception between the new %fs descriptor being loaded and
|
|
* %fs being effectively cleared at __switch_to().
|
|
*/
|
|
if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
|
|
loadsegment(fs, 0);
|
|
|
|
xen_mc_batch();
|
|
|
|
load_TLS_descriptor(t, cpu, 0);
|
|
load_TLS_descriptor(t, cpu, 1);
|
|
load_TLS_descriptor(t, cpu, 2);
|
|
|
|
xen_mc_issue(PARAVIRT_LAZY_CPU);
|
|
}
|
|
|
|
static void xen_load_gs_index(unsigned int idx)
|
|
{
|
|
if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
|
|
BUG();
|
|
}
|
|
|
|
static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
|
|
const void *ptr)
|
|
{
|
|
xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
|
|
u64 entry = *(u64 *)ptr;
|
|
|
|
trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
|
|
|
|
preempt_disable();
|
|
|
|
xen_mc_flush();
|
|
if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
|
|
BUG();
|
|
|
|
preempt_enable();
|
|
}
|
|
|
|
void noist_exc_debug(struct pt_regs *regs);
|
|
|
|
DEFINE_IDTENTRY_RAW(xenpv_exc_nmi)
|
|
{
|
|
/* On Xen PV, NMI doesn't use IST. The C part is the same as native. */
|
|
exc_nmi(regs);
|
|
}
|
|
|
|
DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault)
|
|
{
|
|
/* On Xen PV, DF doesn't use IST. The C part is the same as native. */
|
|
exc_double_fault(regs, error_code);
|
|
}
|
|
|
|
DEFINE_IDTENTRY_RAW(xenpv_exc_debug)
|
|
{
|
|
/*
|
|
* There's no IST on Xen PV, but we still need to dispatch
|
|
* to the correct handler.
|
|
*/
|
|
if (user_mode(regs))
|
|
noist_exc_debug(regs);
|
|
else
|
|
exc_debug(regs);
|
|
}
|
|
|
|
DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap)
|
|
{
|
|
/* This should never happen and there is no way to handle it. */
|
|
instrumentation_begin();
|
|
pr_err("Unknown trap in Xen PV mode.");
|
|
BUG();
|
|
instrumentation_end();
|
|
}
|
|
|
|
#ifdef CONFIG_X86_MCE
|
|
DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check)
|
|
{
|
|
/*
|
|
* There's no IST on Xen PV, but we still need to dispatch
|
|
* to the correct handler.
|
|
*/
|
|
if (user_mode(regs))
|
|
noist_exc_machine_check(regs);
|
|
else
|
|
exc_machine_check(regs);
|
|
}
|
|
#endif
|
|
|
|
struct trap_array_entry {
|
|
void (*orig)(void);
|
|
void (*xen)(void);
|
|
bool ist_okay;
|
|
};
|
|
|
|
#define TRAP_ENTRY(func, ist_ok) { \
|
|
.orig = asm_##func, \
|
|
.xen = xen_asm_##func, \
|
|
.ist_okay = ist_ok }
|
|
|
|
#define TRAP_ENTRY_REDIR(func, ist_ok) { \
|
|
.orig = asm_##func, \
|
|
.xen = xen_asm_xenpv_##func, \
|
|
.ist_okay = ist_ok }
|
|
|
|
static struct trap_array_entry trap_array[] = {
|
|
TRAP_ENTRY_REDIR(exc_debug, true ),
|
|
TRAP_ENTRY_REDIR(exc_double_fault, true ),
|
|
#ifdef CONFIG_X86_MCE
|
|
TRAP_ENTRY_REDIR(exc_machine_check, true ),
|
|
#endif
|
|
TRAP_ENTRY_REDIR(exc_nmi, true ),
|
|
TRAP_ENTRY(exc_int3, false ),
|
|
TRAP_ENTRY(exc_overflow, false ),
|
|
#ifdef CONFIG_IA32_EMULATION
|
|
{ entry_INT80_compat, xen_entry_INT80_compat, false },
|
|
#endif
|
|
TRAP_ENTRY(exc_page_fault, false ),
|
|
TRAP_ENTRY(exc_divide_error, false ),
|
|
TRAP_ENTRY(exc_bounds, false ),
|
|
TRAP_ENTRY(exc_invalid_op, false ),
|
|
TRAP_ENTRY(exc_device_not_available, false ),
|
|
TRAP_ENTRY(exc_coproc_segment_overrun, false ),
|
|
TRAP_ENTRY(exc_invalid_tss, false ),
|
|
TRAP_ENTRY(exc_segment_not_present, false ),
|
|
TRAP_ENTRY(exc_stack_segment, false ),
|
|
TRAP_ENTRY(exc_general_protection, false ),
|
|
TRAP_ENTRY(exc_spurious_interrupt_bug, false ),
|
|
TRAP_ENTRY(exc_coprocessor_error, false ),
|
|
TRAP_ENTRY(exc_alignment_check, false ),
|
|
TRAP_ENTRY(exc_simd_coprocessor_error, false ),
|
|
};
|
|
|
|
static bool __ref get_trap_addr(void **addr, unsigned int ist)
|
|
{
|
|
unsigned int nr;
|
|
bool ist_okay = false;
|
|
bool found = false;
|
|
|
|
/*
|
|
* Replace trap handler addresses by Xen specific ones.
|
|
* Check for known traps using IST and whitelist them.
|
|
* The debugger ones are the only ones we care about.
|
|
* Xen will handle faults like double_fault, so we should never see
|
|
* them. Warn if there's an unexpected IST-using fault handler.
|
|
*/
|
|
for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
|
|
struct trap_array_entry *entry = trap_array + nr;
|
|
|
|
if (*addr == entry->orig) {
|
|
*addr = entry->xen;
|
|
ist_okay = entry->ist_okay;
|
|
found = true;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (nr == ARRAY_SIZE(trap_array) &&
|
|
*addr >= (void *)early_idt_handler_array[0] &&
|
|
*addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
|
|
nr = (*addr - (void *)early_idt_handler_array[0]) /
|
|
EARLY_IDT_HANDLER_SIZE;
|
|
*addr = (void *)xen_early_idt_handler_array[nr];
|
|
found = true;
|
|
}
|
|
|
|
if (!found)
|
|
*addr = (void *)xen_asm_exc_xen_unknown_trap;
|
|
|
|
if (WARN_ON(found && ist != 0 && !ist_okay))
|
|
return false;
|
|
|
|
return true;
|
|
}
|
|
|
|
static int cvt_gate_to_trap(int vector, const gate_desc *val,
|
|
struct trap_info *info)
|
|
{
|
|
unsigned long addr;
|
|
|
|
if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
|
|
return 0;
|
|
|
|
info->vector = vector;
|
|
|
|
addr = gate_offset(val);
|
|
if (!get_trap_addr((void **)&addr, val->bits.ist))
|
|
return 0;
|
|
info->address = addr;
|
|
|
|
info->cs = gate_segment(val);
|
|
info->flags = val->bits.dpl;
|
|
/* interrupt gates clear IF */
|
|
if (val->bits.type == GATE_INTERRUPT)
|
|
info->flags |= 1 << 2;
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Locations of each CPU's IDT */
|
|
static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
|
|
|
|
/* Set an IDT entry. If the entry is part of the current IDT, then
|
|
also update Xen. */
|
|
static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
|
|
{
|
|
unsigned long p = (unsigned long)&dt[entrynum];
|
|
unsigned long start, end;
|
|
|
|
trace_xen_cpu_write_idt_entry(dt, entrynum, g);
|
|
|
|
preempt_disable();
|
|
|
|
start = __this_cpu_read(idt_desc.address);
|
|
end = start + __this_cpu_read(idt_desc.size) + 1;
|
|
|
|
xen_mc_flush();
|
|
|
|
native_write_idt_entry(dt, entrynum, g);
|
|
|
|
if (p >= start && (p + 8) <= end) {
|
|
struct trap_info info[2];
|
|
|
|
info[1].address = 0;
|
|
|
|
if (cvt_gate_to_trap(entrynum, g, &info[0]))
|
|
if (HYPERVISOR_set_trap_table(info))
|
|
BUG();
|
|
}
|
|
|
|
preempt_enable();
|
|
}
|
|
|
|
static void xen_convert_trap_info(const struct desc_ptr *desc,
|
|
struct trap_info *traps)
|
|
{
|
|
unsigned in, out, count;
|
|
|
|
count = (desc->size+1) / sizeof(gate_desc);
|
|
BUG_ON(count > 256);
|
|
|
|
for (in = out = 0; in < count; in++) {
|
|
gate_desc *entry = (gate_desc *)(desc->address) + in;
|
|
|
|
if (cvt_gate_to_trap(in, entry, &traps[out]))
|
|
out++;
|
|
}
|
|
traps[out].address = 0;
|
|
}
|
|
|
|
void xen_copy_trap_info(struct trap_info *traps)
|
|
{
|
|
const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
|
|
|
|
xen_convert_trap_info(desc, traps);
|
|
}
|
|
|
|
/* Load a new IDT into Xen. In principle this can be per-CPU, so we
|
|
hold a spinlock to protect the static traps[] array (static because
|
|
it avoids allocation, and saves stack space). */
|
|
static void xen_load_idt(const struct desc_ptr *desc)
|
|
{
|
|
static DEFINE_SPINLOCK(lock);
|
|
static struct trap_info traps[257];
|
|
|
|
trace_xen_cpu_load_idt(desc);
|
|
|
|
spin_lock(&lock);
|
|
|
|
memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
|
|
|
|
xen_convert_trap_info(desc, traps);
|
|
|
|
xen_mc_flush();
|
|
if (HYPERVISOR_set_trap_table(traps))
|
|
BUG();
|
|
|
|
spin_unlock(&lock);
|
|
}
|
|
|
|
/* Write a GDT descriptor entry. Ignore LDT descriptors, since
|
|
they're handled differently. */
|
|
static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
|
|
const void *desc, int type)
|
|
{
|
|
trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
|
|
|
|
preempt_disable();
|
|
|
|
switch (type) {
|
|
case DESC_LDT:
|
|
case DESC_TSS:
|
|
/* ignore */
|
|
break;
|
|
|
|
default: {
|
|
xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
|
|
|
|
xen_mc_flush();
|
|
if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
|
|
BUG();
|
|
}
|
|
|
|
}
|
|
|
|
preempt_enable();
|
|
}
|
|
|
|
/*
|
|
* Version of write_gdt_entry for use at early boot-time needed to
|
|
* update an entry as simply as possible.
|
|
*/
|
|
static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
|
|
const void *desc, int type)
|
|
{
|
|
trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
|
|
|
|
switch (type) {
|
|
case DESC_LDT:
|
|
case DESC_TSS:
|
|
/* ignore */
|
|
break;
|
|
|
|
default: {
|
|
xmaddr_t maddr = virt_to_machine(&dt[entry]);
|
|
|
|
if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
|
|
dt[entry] = *(struct desc_struct *)desc;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
static void xen_load_sp0(unsigned long sp0)
|
|
{
|
|
struct multicall_space mcs;
|
|
|
|
mcs = xen_mc_entry(0);
|
|
MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
|
|
xen_mc_issue(PARAVIRT_LAZY_CPU);
|
|
this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
|
|
}
|
|
|
|
#ifdef CONFIG_X86_IOPL_IOPERM
|
|
static void xen_invalidate_io_bitmap(void)
|
|
{
|
|
struct physdev_set_iobitmap iobitmap = {
|
|
.bitmap = NULL,
|
|
.nr_ports = 0,
|
|
};
|
|
|
|
native_tss_invalidate_io_bitmap();
|
|
HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
|
|
}
|
|
|
|
static void xen_update_io_bitmap(void)
|
|
{
|
|
struct physdev_set_iobitmap iobitmap;
|
|
struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
|
|
|
|
native_tss_update_io_bitmap();
|
|
|
|
iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) +
|
|
tss->x86_tss.io_bitmap_base;
|
|
if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID)
|
|
iobitmap.nr_ports = 0;
|
|
else
|
|
iobitmap.nr_ports = IO_BITMAP_BITS;
|
|
|
|
HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
|
|
}
|
|
#endif
|
|
|
|
static void xen_io_delay(void)
|
|
{
|
|
}
|
|
|
|
static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
|
|
|
|
static unsigned long xen_read_cr0(void)
|
|
{
|
|
unsigned long cr0 = this_cpu_read(xen_cr0_value);
|
|
|
|
if (unlikely(cr0 == 0)) {
|
|
cr0 = native_read_cr0();
|
|
this_cpu_write(xen_cr0_value, cr0);
|
|
}
|
|
|
|
return cr0;
|
|
}
|
|
|
|
static void xen_write_cr0(unsigned long cr0)
|
|
{
|
|
struct multicall_space mcs;
|
|
|
|
this_cpu_write(xen_cr0_value, cr0);
|
|
|
|
/* Only pay attention to cr0.TS; everything else is
|
|
ignored. */
|
|
mcs = xen_mc_entry(0);
|
|
|
|
MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
|
|
|
|
xen_mc_issue(PARAVIRT_LAZY_CPU);
|
|
}
|
|
|
|
static void xen_write_cr4(unsigned long cr4)
|
|
{
|
|
cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
|
|
|
|
native_write_cr4(cr4);
|
|
}
|
|
|
|
static u64 xen_read_msr_safe(unsigned int msr, int *err)
|
|
{
|
|
u64 val;
|
|
|
|
if (pmu_msr_read(msr, &val, err))
|
|
return val;
|
|
|
|
val = native_read_msr_safe(msr, err);
|
|
switch (msr) {
|
|
case MSR_IA32_APICBASE:
|
|
val &= ~X2APIC_ENABLE;
|
|
break;
|
|
}
|
|
return val;
|
|
}
|
|
|
|
static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
|
|
{
|
|
int ret;
|
|
unsigned int which;
|
|
u64 base;
|
|
|
|
ret = 0;
|
|
|
|
switch (msr) {
|
|
case MSR_FS_BASE: which = SEGBASE_FS; goto set;
|
|
case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
|
|
case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
|
|
|
|
set:
|
|
base = ((u64)high << 32) | low;
|
|
if (HYPERVISOR_set_segment_base(which, base) != 0)
|
|
ret = -EIO;
|
|
break;
|
|
|
|
case MSR_STAR:
|
|
case MSR_CSTAR:
|
|
case MSR_LSTAR:
|
|
case MSR_SYSCALL_MASK:
|
|
case MSR_IA32_SYSENTER_CS:
|
|
case MSR_IA32_SYSENTER_ESP:
|
|
case MSR_IA32_SYSENTER_EIP:
|
|
/* Fast syscall setup is all done in hypercalls, so
|
|
these are all ignored. Stub them out here to stop
|
|
Xen console noise. */
|
|
break;
|
|
|
|
default:
|
|
if (!pmu_msr_write(msr, low, high, &ret))
|
|
ret = native_write_msr_safe(msr, low, high);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static u64 xen_read_msr(unsigned int msr)
|
|
{
|
|
/*
|
|
* This will silently swallow a #GP from RDMSR. It may be worth
|
|
* changing that.
|
|
*/
|
|
int err;
|
|
|
|
return xen_read_msr_safe(msr, &err);
|
|
}
|
|
|
|
static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
|
|
{
|
|
/*
|
|
* This will silently swallow a #GP from WRMSR. It may be worth
|
|
* changing that.
|
|
*/
|
|
xen_write_msr_safe(msr, low, high);
|
|
}
|
|
|
|
/* This is called once we have the cpu_possible_mask */
|
|
void __init xen_setup_vcpu_info_placement(void)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
/* Set up direct vCPU id mapping for PV guests. */
|
|
per_cpu(xen_vcpu_id, cpu) = cpu;
|
|
|
|
/*
|
|
* xen_vcpu_setup(cpu) can fail -- in which case it
|
|
* falls back to the shared_info version for cpus
|
|
* where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
|
|
*
|
|
* xen_cpu_up_prepare_pv() handles the rest by failing
|
|
* them in hotplug.
|
|
*/
|
|
(void) xen_vcpu_setup(cpu);
|
|
}
|
|
|
|
/*
|
|
* xen_vcpu_setup managed to place the vcpu_info within the
|
|
* percpu area for all cpus, so make use of it.
|
|
*/
|
|
if (xen_have_vcpu_info_placement) {
|
|
pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
|
|
pv_ops.irq.irq_disable =
|
|
__PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
|
|
pv_ops.irq.irq_enable =
|
|
__PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
|
|
pv_ops.mmu.read_cr2 =
|
|
__PV_IS_CALLEE_SAVE(xen_read_cr2_direct);
|
|
}
|
|
}
|
|
|
|
static const struct pv_info xen_info __initconst = {
|
|
.extra_user_64bit_cs = FLAT_USER_CS64,
|
|
.name = "Xen",
|
|
};
|
|
|
|
static const struct pv_cpu_ops xen_cpu_ops __initconst = {
|
|
.cpuid = xen_cpuid,
|
|
|
|
.set_debugreg = xen_set_debugreg,
|
|
.get_debugreg = xen_get_debugreg,
|
|
|
|
.read_cr0 = xen_read_cr0,
|
|
.write_cr0 = xen_write_cr0,
|
|
|
|
.write_cr4 = xen_write_cr4,
|
|
|
|
.wbinvd = native_wbinvd,
|
|
|
|
.read_msr = xen_read_msr,
|
|
.write_msr = xen_write_msr,
|
|
|
|
.read_msr_safe = xen_read_msr_safe,
|
|
.write_msr_safe = xen_write_msr_safe,
|
|
|
|
.read_pmc = xen_read_pmc,
|
|
|
|
.load_tr_desc = paravirt_nop,
|
|
.set_ldt = xen_set_ldt,
|
|
.load_gdt = xen_load_gdt,
|
|
.load_idt = xen_load_idt,
|
|
.load_tls = xen_load_tls,
|
|
.load_gs_index = xen_load_gs_index,
|
|
|
|
.alloc_ldt = xen_alloc_ldt,
|
|
.free_ldt = xen_free_ldt,
|
|
|
|
.store_tr = xen_store_tr,
|
|
|
|
.write_ldt_entry = xen_write_ldt_entry,
|
|
.write_gdt_entry = xen_write_gdt_entry,
|
|
.write_idt_entry = xen_write_idt_entry,
|
|
.load_sp0 = xen_load_sp0,
|
|
|
|
#ifdef CONFIG_X86_IOPL_IOPERM
|
|
.invalidate_io_bitmap = xen_invalidate_io_bitmap,
|
|
.update_io_bitmap = xen_update_io_bitmap,
|
|
#endif
|
|
.io_delay = xen_io_delay,
|
|
|
|
.start_context_switch = paravirt_start_context_switch,
|
|
.end_context_switch = xen_end_context_switch,
|
|
};
|
|
|
|
static void xen_restart(char *msg)
|
|
{
|
|
xen_reboot(SHUTDOWN_reboot);
|
|
}
|
|
|
|
static void xen_machine_halt(void)
|
|
{
|
|
xen_reboot(SHUTDOWN_poweroff);
|
|
}
|
|
|
|
static void xen_machine_power_off(void)
|
|
{
|
|
if (pm_power_off)
|
|
pm_power_off();
|
|
xen_reboot(SHUTDOWN_poweroff);
|
|
}
|
|
|
|
static void xen_crash_shutdown(struct pt_regs *regs)
|
|
{
|
|
xen_reboot(SHUTDOWN_crash);
|
|
}
|
|
|
|
static const struct machine_ops xen_machine_ops __initconst = {
|
|
.restart = xen_restart,
|
|
.halt = xen_machine_halt,
|
|
.power_off = xen_machine_power_off,
|
|
.shutdown = xen_machine_halt,
|
|
.crash_shutdown = xen_crash_shutdown,
|
|
.emergency_restart = xen_emergency_restart,
|
|
};
|
|
|
|
static unsigned char xen_get_nmi_reason(void)
|
|
{
|
|
unsigned char reason = 0;
|
|
|
|
/* Construct a value which looks like it came from port 0x61. */
|
|
if (test_bit(_XEN_NMIREASON_io_error,
|
|
&HYPERVISOR_shared_info->arch.nmi_reason))
|
|
reason |= NMI_REASON_IOCHK;
|
|
if (test_bit(_XEN_NMIREASON_pci_serr,
|
|
&HYPERVISOR_shared_info->arch.nmi_reason))
|
|
reason |= NMI_REASON_SERR;
|
|
|
|
return reason;
|
|
}
|
|
|
|
static void __init xen_boot_params_init_edd(void)
|
|
{
|
|
#if IS_ENABLED(CONFIG_EDD)
|
|
struct xen_platform_op op;
|
|
struct edd_info *edd_info;
|
|
u32 *mbr_signature;
|
|
unsigned nr;
|
|
int ret;
|
|
|
|
edd_info = boot_params.eddbuf;
|
|
mbr_signature = boot_params.edd_mbr_sig_buffer;
|
|
|
|
op.cmd = XENPF_firmware_info;
|
|
|
|
op.u.firmware_info.type = XEN_FW_DISK_INFO;
|
|
for (nr = 0; nr < EDDMAXNR; nr++) {
|
|
struct edd_info *info = edd_info + nr;
|
|
|
|
op.u.firmware_info.index = nr;
|
|
info->params.length = sizeof(info->params);
|
|
set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
|
|
&info->params);
|
|
ret = HYPERVISOR_platform_op(&op);
|
|
if (ret)
|
|
break;
|
|
|
|
#define C(x) info->x = op.u.firmware_info.u.disk_info.x
|
|
C(device);
|
|
C(version);
|
|
C(interface_support);
|
|
C(legacy_max_cylinder);
|
|
C(legacy_max_head);
|
|
C(legacy_sectors_per_track);
|
|
#undef C
|
|
}
|
|
boot_params.eddbuf_entries = nr;
|
|
|
|
op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
|
|
for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
|
|
op.u.firmware_info.index = nr;
|
|
ret = HYPERVISOR_platform_op(&op);
|
|
if (ret)
|
|
break;
|
|
mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
|
|
}
|
|
boot_params.edd_mbr_sig_buf_entries = nr;
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Set up the GDT and segment registers for -fstack-protector. Until
|
|
* we do this, we have to be careful not to call any stack-protected
|
|
* function, which is most of the kernel.
|
|
*/
|
|
static void __init xen_setup_gdt(int cpu)
|
|
{
|
|
pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
|
|
pv_ops.cpu.load_gdt = xen_load_gdt_boot;
|
|
|
|
switch_to_new_gdt(cpu);
|
|
|
|
pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
|
|
pv_ops.cpu.load_gdt = xen_load_gdt;
|
|
}
|
|
|
|
static void __init xen_dom0_set_legacy_features(void)
|
|
{
|
|
x86_platform.legacy.rtc = 1;
|
|
}
|
|
|
|
/* First C function to be called on Xen boot */
|
|
asmlinkage __visible void __init xen_start_kernel(void)
|
|
{
|
|
struct physdev_set_iopl set_iopl;
|
|
unsigned long initrd_start = 0;
|
|
int rc;
|
|
|
|
if (!xen_start_info)
|
|
return;
|
|
|
|
xen_domain_type = XEN_PV_DOMAIN;
|
|
xen_start_flags = xen_start_info->flags;
|
|
|
|
xen_setup_features();
|
|
|
|
/* Install Xen paravirt ops */
|
|
pv_info = xen_info;
|
|
pv_ops.cpu = xen_cpu_ops;
|
|
paravirt_iret = xen_iret;
|
|
xen_init_irq_ops();
|
|
|
|
/*
|
|
* Setup xen_vcpu early because it is needed for
|
|
* local_irq_disable(), irqs_disabled(), e.g. in printk().
|
|
*
|
|
* Don't do the full vcpu_info placement stuff until we have
|
|
* the cpu_possible_mask and a non-dummy shared_info.
|
|
*/
|
|
xen_vcpu_info_reset(0);
|
|
|
|
x86_platform.get_nmi_reason = xen_get_nmi_reason;
|
|
|
|
x86_init.resources.memory_setup = xen_memory_setup;
|
|
x86_init.irqs.intr_mode_select = x86_init_noop;
|
|
x86_init.irqs.intr_mode_init = x86_init_noop;
|
|
x86_init.oem.arch_setup = xen_arch_setup;
|
|
x86_init.oem.banner = xen_banner;
|
|
x86_init.hyper.init_platform = xen_pv_init_platform;
|
|
x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
|
|
|
|
/*
|
|
* Set up some pagetable state before starting to set any ptes.
|
|
*/
|
|
|
|
xen_setup_machphys_mapping();
|
|
xen_init_mmu_ops();
|
|
|
|
/* Prevent unwanted bits from being set in PTEs. */
|
|
__supported_pte_mask &= ~_PAGE_GLOBAL;
|
|
__default_kernel_pte_mask &= ~_PAGE_GLOBAL;
|
|
|
|
/*
|
|
* Prevent page tables from being allocated in highmem, even
|
|
* if CONFIG_HIGHPTE is enabled.
|
|
*/
|
|
__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
|
|
|
|
/* Get mfn list */
|
|
xen_build_dynamic_phys_to_machine();
|
|
|
|
/* Work out if we support NX */
|
|
get_cpu_cap(&boot_cpu_data);
|
|
x86_configure_nx();
|
|
|
|
/*
|
|
* Set up kernel GDT and segment registers, mainly so that
|
|
* -fstack-protector code can be executed.
|
|
*/
|
|
xen_setup_gdt(0);
|
|
|
|
/* Determine virtual and physical address sizes */
|
|
get_cpu_address_sizes(&boot_cpu_data);
|
|
|
|
/* Let's presume PV guests always boot on vCPU with id 0. */
|
|
per_cpu(xen_vcpu_id, 0) = 0;
|
|
|
|
idt_setup_early_handler();
|
|
|
|
xen_init_capabilities();
|
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
|
/*
|
|
* set up the basic apic ops.
|
|
*/
|
|
xen_init_apic();
|
|
#endif
|
|
|
|
machine_ops = xen_machine_ops;
|
|
|
|
/*
|
|
* The only reliable way to retain the initial address of the
|
|
* percpu gdt_page is to remember it here, so we can go and
|
|
* mark it RW later, when the initial percpu area is freed.
|
|
*/
|
|
xen_initial_gdt = &per_cpu(gdt_page, 0);
|
|
|
|
xen_smp_init();
|
|
|
|
#ifdef CONFIG_ACPI_NUMA
|
|
/*
|
|
* The pages we from Xen are not related to machine pages, so
|
|
* any NUMA information the kernel tries to get from ACPI will
|
|
* be meaningless. Prevent it from trying.
|
|
*/
|
|
disable_srat();
|
|
#endif
|
|
WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
|
|
|
|
local_irq_disable();
|
|
early_boot_irqs_disabled = true;
|
|
|
|
xen_raw_console_write("mapping kernel into physical memory\n");
|
|
xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
|
|
xen_start_info->nr_pages);
|
|
xen_reserve_special_pages();
|
|
|
|
/*
|
|
* We used to do this in xen_arch_setup, but that is too late
|
|
* on AMD were early_cpu_init (run before ->arch_setup()) calls
|
|
* early_amd_init which pokes 0xcf8 port.
|
|
*/
|
|
set_iopl.iopl = 1;
|
|
rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
|
|
if (rc != 0)
|
|
xen_raw_printk("physdev_op failed %d\n", rc);
|
|
|
|
|
|
if (xen_start_info->mod_start) {
|
|
if (xen_start_info->flags & SIF_MOD_START_PFN)
|
|
initrd_start = PFN_PHYS(xen_start_info->mod_start);
|
|
else
|
|
initrd_start = __pa(xen_start_info->mod_start);
|
|
}
|
|
|
|
/* Poke various useful things into boot_params */
|
|
boot_params.hdr.type_of_loader = (9 << 4) | 0;
|
|
boot_params.hdr.ramdisk_image = initrd_start;
|
|
boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
|
|
boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
|
|
boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
|
|
|
|
if (!xen_initial_domain()) {
|
|
add_preferred_console("xenboot", 0, NULL);
|
|
if (pci_xen)
|
|
x86_init.pci.arch_init = pci_xen_init;
|
|
} else {
|
|
const struct dom0_vga_console_info *info =
|
|
(void *)((char *)xen_start_info +
|
|
xen_start_info->console.dom0.info_off);
|
|
struct xen_platform_op op = {
|
|
.cmd = XENPF_firmware_info,
|
|
.interface_version = XENPF_INTERFACE_VERSION,
|
|
.u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
|
|
};
|
|
|
|
x86_platform.set_legacy_features =
|
|
xen_dom0_set_legacy_features;
|
|
xen_init_vga(info, xen_start_info->console.dom0.info_size);
|
|
xen_start_info->console.domU.mfn = 0;
|
|
xen_start_info->console.domU.evtchn = 0;
|
|
|
|
if (HYPERVISOR_platform_op(&op) == 0)
|
|
boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
|
|
|
|
/* Make sure ACS will be enabled */
|
|
pci_request_acs();
|
|
|
|
xen_acpi_sleep_register();
|
|
|
|
/* Avoid searching for BIOS MP tables */
|
|
x86_init.mpparse.find_smp_config = x86_init_noop;
|
|
x86_init.mpparse.get_smp_config = x86_init_uint_noop;
|
|
|
|
xen_boot_params_init_edd();
|
|
|
|
#ifdef CONFIG_ACPI
|
|
/*
|
|
* Disable selecting "Firmware First mode" for correctable
|
|
* memory errors, as this is the duty of the hypervisor to
|
|
* decide.
|
|
*/
|
|
acpi_disable_cmcff = 1;
|
|
#endif
|
|
}
|
|
|
|
if (!boot_params.screen_info.orig_video_isVGA)
|
|
add_preferred_console("tty", 0, NULL);
|
|
add_preferred_console("hvc", 0, NULL);
|
|
if (boot_params.screen_info.orig_video_isVGA)
|
|
add_preferred_console("tty", 0, NULL);
|
|
|
|
#ifdef CONFIG_PCI
|
|
/* PCI BIOS service won't work from a PV guest. */
|
|
pci_probe &= ~PCI_PROBE_BIOS;
|
|
#endif
|
|
xen_raw_console_write("about to get started...\n");
|
|
|
|
/* We need this for printk timestamps */
|
|
xen_setup_runstate_info(0);
|
|
|
|
xen_efi_init(&boot_params);
|
|
|
|
/* Start the world */
|
|
cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
|
|
x86_64_start_reservations((char *)__pa_symbol(&boot_params));
|
|
}
|
|
|
|
static int xen_cpu_up_prepare_pv(unsigned int cpu)
|
|
{
|
|
int rc;
|
|
|
|
if (per_cpu(xen_vcpu, cpu) == NULL)
|
|
return -ENODEV;
|
|
|
|
xen_setup_timer(cpu);
|
|
|
|
rc = xen_smp_intr_init(cpu);
|
|
if (rc) {
|
|
WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
|
|
cpu, rc);
|
|
return rc;
|
|
}
|
|
|
|
rc = xen_smp_intr_init_pv(cpu);
|
|
if (rc) {
|
|
WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
|
|
cpu, rc);
|
|
return rc;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int xen_cpu_dead_pv(unsigned int cpu)
|
|
{
|
|
xen_smp_intr_free(cpu);
|
|
xen_smp_intr_free_pv(cpu);
|
|
|
|
xen_teardown_timer(cpu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static uint32_t __init xen_platform_pv(void)
|
|
{
|
|
if (xen_pv_domain())
|
|
return xen_cpuid_base();
|
|
|
|
return 0;
|
|
}
|
|
|
|
const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
|
|
.name = "Xen PV",
|
|
.detect = xen_platform_pv,
|
|
.type = X86_HYPER_XEN_PV,
|
|
.runtime.pin_vcpu = xen_pin_vcpu,
|
|
.ignore_nopv = true,
|
|
};
|