mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-30 07:34:12 +08:00
8362fd64f0
Various driver updates for platforms and a couple of the small driver subsystems we merge through our tree: - A driver for SCU (system control) on NXP i.MX8QXP - Qualcomm Always-on Subsystem messaging driver (AOSS QMP) - Qualcomm PM support for MSM8998 - Support for a newer version of DRAM PHY driver for Broadcom (DPFE) - Reset controller support for Bitmain BM1880 - TI SCI (System Control Interface) support for CPU control on AM654 processors - More TI sysc refactoring and rework -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl0yK3YPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3WdUQAJEFRzY4+8VfsUspKmGwzHsrk7t1038JUEDE VL3yYlvSGeHg5a58AI5PCR5ZCsyPK7Yw9cAcYexd0frFR7BCwKWrjqem0Lb5ovdK CYM517DRtYPSBMF08Xw4pbZlT0yg65F1e9cf6BlUpkUZ6lJn4gUy8Y4BE6Aw/zuF QKtQNs6Q8BUZqS3uoOpJ/PY4JiUmLPQPO4Lry7Lud8Z7qgArCC326paC3wwqjLoC TpoMqb6izt7Vzo4BtTo5TUCyiEFZDlb/thhDySVlYRE7DQJusHBvRO9qgjI2ahOo 1/935q1fJO7S6+Yvc8DIzrD/DrIUOvOshi31F/J6iWKkQkTUxtQwsVReZKaiOfSD fYxNVCgTcMS6ailKQSMQ0SYgXDa2gWdV3tS9XU8qML3tnDthi1nDmZks0QAAnFPS bXRcWGtgqeQJ+QJ7yyKrsD9POeaq3Hc5/f1DN34H//Cyn0ip/fD6fkLCMIfUDwmu TmO2Mnj6/fG/iBK+ToF+DaJ0/u3RiV2MC2vCE+0m3cVI9jtq9iA1y3UlmoaKUhhC t9znA+u8/Jc5S2zNQriI2Ja5q8nKfihL7Jf68ENvGzLc7YuAqP6yx1LMg1g6Wshc nLT+kHOF6DCUC3W7a8VuNyaxCwVtTbNTti+nvQVOmV6eaGiD5vzpXkHBWMbOJ7Lh YOBwGyb4 =ek+j -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms and a couple of the small driver subsystems we merge through our tree: - A driver for SCU (system control) on NXP i.MX8QXP - Qualcomm Always-on Subsystem messaging driver (AOSS QMP) - Qualcomm PM support for MSM8998 - Support for a newer version of DRAM PHY driver for Broadcom (DPFE) - Reset controller support for Bitmain BM1880 - TI SCI (System Control Interface) support for CPU control on AM654 processors - More TI sysc refactoring and rework" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits) reset: remove redundant null check on pointer dev soc: rockchip: work around clang warning dt-bindings: reset: imx7: Fix the spelling of 'indices' soc: imx: Add i.MX8MN SoC driver support soc: aspeed: lpc-ctrl: Fix probe error handling soc: qcom: geni: Add support for ACPI firmware: ti_sci: Fix gcc unused-but-set-variable warning firmware: ti_sci: Use the correct style for SPDX License Identifier soc: imx8: Use existing of_root directly soc: imx8: Fix potential kernel dump in error path firmware/psci: psci_checker: Park kthreads before stopping them memory: move jedec_ddr.h from include/memory to drivers/memory/ memory: move jedec_ddr_data.c from lib/ to drivers/memory/ MAINTAINERS: Remove myself as qcom maintainer soc: aspeed: lpc-ctrl: make parameter optional soc: qcom: apr: Don't use reg for domain id soc: qcom: fix QCOM_AOSS_QMP dependency and build errors memory: tegra: Fix -Wunused-const-variable firmware: tegra: Early resume BPMP soc/tegra: Select pinctrl for Tegra194 ...
170 lines
5.5 KiB
Plaintext
170 lines
5.5 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
|
|
#
|
|
# Memory devices
|
|
#
|
|
|
|
menuconfig MEMORY
|
|
bool "Memory Controller drivers"
|
|
|
|
if MEMORY
|
|
|
|
config DDR
|
|
bool
|
|
help
|
|
Data from JEDEC specs for DDR SDRAM memories,
|
|
particularly the AC timing parameters and addressing
|
|
information. This data is useful for drivers handling
|
|
DDR SDRAM controllers.
|
|
|
|
config ARM_PL172_MPMC
|
|
tristate "ARM PL172 MPMC driver"
|
|
depends on ARM_AMBA && OF
|
|
help
|
|
This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
|
|
If you have an embedded system with an AMBA bus and a PL172
|
|
controller, say Y or M here.
|
|
|
|
config ATMEL_SDRAMC
|
|
bool "Atmel (Multi-port DDR-)SDRAM Controller"
|
|
default y
|
|
depends on ARCH_AT91 && OF
|
|
help
|
|
This driver is for Atmel SDRAM Controller or Atmel Multi-port
|
|
DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
|
|
Starting with the at91sam9g45, this controller supports SDR, DDR and
|
|
LP-DDR memories.
|
|
|
|
config ATMEL_EBI
|
|
bool "Atmel EBI driver"
|
|
default y
|
|
depends on ARCH_AT91 && OF
|
|
select MFD_SYSCON
|
|
select MFD_ATMEL_SMC
|
|
help
|
|
Driver for Atmel EBI controller.
|
|
Used to configure the EBI (external bus interface) when the device-
|
|
tree is used. This bus supports NANDs, external ethernet controller,
|
|
SRAMs, ATA devices, etc.
|
|
|
|
config TI_AEMIF
|
|
tristate "Texas Instruments AEMIF driver"
|
|
depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
|
|
help
|
|
This driver is for the AEMIF module available in Texas Instruments
|
|
SoCs. AEMIF stands for Asynchronous External Memory Interface and
|
|
is intended to provide a glue-less interface to a variety of
|
|
asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
|
|
of 256M bytes of any of these memories can be accessed at a given
|
|
time via four chip selects with 64M byte access per chip select.
|
|
|
|
config TI_EMIF
|
|
tristate "Texas Instruments EMIF driver"
|
|
depends on ARCH_OMAP2PLUS
|
|
select DDR
|
|
help
|
|
This driver is for the EMIF module available in Texas Instruments
|
|
SoCs. EMIF is an SDRAM controller that, based on its revision,
|
|
supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
|
|
This driver takes care of only LPDDR2 memories presently. The
|
|
functions of the driver includes re-configuring AC timing
|
|
parameters and other settings during frequency, voltage and
|
|
temperature changes
|
|
|
|
config OMAP_GPMC
|
|
bool
|
|
select GPIOLIB
|
|
help
|
|
This driver is for the General Purpose Memory Controller (GPMC)
|
|
present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
|
|
interfacing to a variety of asynchronous as well as synchronous
|
|
memory drives like NOR, NAND, OneNAND, SRAM.
|
|
|
|
config OMAP_GPMC_DEBUG
|
|
bool "Enable GPMC debug output and skip reset of GPMC during init"
|
|
depends on OMAP_GPMC
|
|
help
|
|
Enables verbose debugging mostly to decode the bootloader provided
|
|
timings. To preserve the bootloader provided timings, the reset
|
|
of GPMC is skipped during init. Enable this during development to
|
|
configure devices connected to the GPMC bus.
|
|
|
|
NOTE: In addition to matching the register setup with the bootloader
|
|
you also need to match the GPMC FCLK frequency used by the
|
|
bootloader or else the GPMC timings won't be identical with the
|
|
bootloader timings.
|
|
|
|
config TI_EMIF_SRAM
|
|
tristate "Texas Instruments EMIF SRAM driver"
|
|
depends on (SOC_AM33XX || SOC_AM43XX) && SRAM
|
|
help
|
|
This driver is for the EMIF module available on Texas Instruments
|
|
AM33XX and AM43XX SoCs and is required for PM. Certain parts of
|
|
the EMIF PM code must run from on-chip SRAM late in the suspend
|
|
sequence so this driver provides several relocatable PM functions
|
|
for the SoC PM code to use.
|
|
|
|
config MVEBU_DEVBUS
|
|
bool "Marvell EBU Device Bus Controller"
|
|
default y
|
|
depends on PLAT_ORION && OF
|
|
help
|
|
This driver is for the Device Bus controller available in some
|
|
Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
|
|
Armada 370 and Armada XP. This controller allows to handle flash
|
|
devices such as NOR, NAND, SRAM, and FPGA.
|
|
|
|
config FSL_CORENET_CF
|
|
tristate "Freescale CoreNet Error Reporting"
|
|
depends on FSL_SOC_BOOKE
|
|
help
|
|
Say Y for reporting of errors from the Freescale CoreNet
|
|
Coherency Fabric. Errors reported include accesses to
|
|
physical addresses that mapped by no local access window
|
|
(LAW) or an invalid LAW, as well as bad cache state that
|
|
represents a coherency violation.
|
|
|
|
config FSL_IFC
|
|
bool
|
|
depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
|
|
depends on HAS_IOMEM
|
|
|
|
config JZ4780_NEMC
|
|
bool "Ingenic JZ4780 SoC NEMC driver"
|
|
default y
|
|
depends on MIPS || COMPILE_TEST
|
|
depends on HAS_IOMEM && OF
|
|
help
|
|
This driver is for the NAND/External Memory Controller (NEMC) in
|
|
the Ingenic JZ4780. This controller is used to handle external
|
|
memory devices such as NAND and SRAM.
|
|
|
|
config MTK_SMI
|
|
bool
|
|
depends on ARCH_MEDIATEK || COMPILE_TEST
|
|
help
|
|
This driver is for the Memory Controller module in MediaTek SoCs,
|
|
mainly help enable/disable iommu and control the power domain and
|
|
clocks for each local arbiter.
|
|
|
|
config DA8XX_DDRCTL
|
|
bool "Texas Instruments da8xx DDR2/mDDR driver"
|
|
depends on ARCH_DAVINCI_DA8XX
|
|
help
|
|
This driver is for the DDR2/mDDR Memory Controller present on
|
|
Texas Instruments da8xx SoCs. It's used to tweak various memory
|
|
controller configuration options.
|
|
|
|
config PL353_SMC
|
|
tristate "ARM PL35X Static Memory Controller(SMC) driver"
|
|
default y
|
|
depends on ARM
|
|
depends on ARM_AMBA
|
|
help
|
|
This driver is for the ARM PL351/PL353 Static Memory
|
|
Controller(SMC) module.
|
|
|
|
source "drivers/memory/samsung/Kconfig"
|
|
source "drivers/memory/tegra/Kconfig"
|
|
|
|
endif
|