Matt Roper 71cd86cfaa drm/i915/tgl: Use refclk/2 as bypass frequency ... Unlike gen11, which always ran at 50MHz when the cdclk PLL was disabled, TGL runs at refclk/2. The 50MHz croclk/2 is only used by hardware during some power state transitions. Bspec: 49201 Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190905181337.23727-1-matthew.d.roper@intel.com Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>		2019-09-06 08:42:13 -07:00
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drm	drm/i915/tgl: Use refclk/2 as bypass frequency	2019-09-06 08:42:13 -07:00
host1x	drm/tegra: Changes for v5.3-rc1	2019-06-25 12:59:43 +10:00
ipu-v3	drm main pull request for v5.3-rc1 (sans mm changes)	2019-07-15 19:04:27 -07:00
vga	topic/remove-fbcon-notifiers:	2019-06-26 12:26:34 +02:00
Makefile	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00