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5c29e86499
This driver uses three clocks and there's no special handling, they're either enabled or disabled sequentially: migrate to the clk_bulk API to simplify clock handling. This patch brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220404145558.93340-1-angelogioacchino.delregno@collabora.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
543 lines
13 KiB
C
543 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 MediaTek Inc.
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*
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* Author:
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* Min Guo <min.guo@mediatek.com>
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* Yonglong Wu <yonglong.wu@mediatek.com>
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*/
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/usb/role.h>
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#include <linux/usb/usb_phy_generic.h>
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#include "musb_core.h"
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#include "musb_dma.h"
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#define USB_L1INTS 0x00a0
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#define USB_L1INTM 0x00a4
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#define MTK_MUSB_TXFUNCADDR 0x0480
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/* MediaTek controller toggle enable and status reg */
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#define MUSB_RXTOG 0x80
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#define MUSB_RXTOGEN 0x82
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#define MUSB_TXTOG 0x84
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#define MUSB_TXTOGEN 0x86
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#define MTK_TOGGLE_EN GENMASK(15, 0)
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#define TX_INT_STATUS BIT(0)
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#define RX_INT_STATUS BIT(1)
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#define USBCOM_INT_STATUS BIT(2)
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#define DMA_INT_STATUS BIT(3)
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#define DMA_INTR_STATUS_MSK GENMASK(7, 0)
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#define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24)
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#define MTK_MUSB_CLKS_NUM 3
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struct mtk_glue {
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struct device *dev;
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struct musb *musb;
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struct platform_device *musb_pdev;
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struct platform_device *usb_phy;
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struct phy *phy;
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struct usb_phy *xceiv;
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enum phy_mode phy_mode;
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struct clk_bulk_data clks[MTK_MUSB_CLKS_NUM];
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enum usb_role role;
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struct usb_role_switch *role_sw;
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};
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static int mtk_musb_clks_get(struct mtk_glue *glue)
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{
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struct device *dev = glue->dev;
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glue->clks[0].id = "main";
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glue->clks[1].id = "mcu";
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glue->clks[2].id = "univpll";
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return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, glue->clks);
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}
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static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role)
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{
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struct musb *musb = glue->musb;
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u8 devctl = readb(musb->mregs + MUSB_DEVCTL);
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enum usb_role new_role;
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if (role == glue->role)
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return 0;
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switch (role) {
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case USB_ROLE_HOST:
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
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glue->phy_mode = PHY_MODE_USB_HOST;
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new_role = USB_ROLE_HOST;
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if (glue->role == USB_ROLE_NONE)
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phy_power_on(glue->phy);
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devctl |= MUSB_DEVCTL_SESSION;
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musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
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MUSB_HST_MODE(musb);
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break;
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case USB_ROLE_DEVICE:
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musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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glue->phy_mode = PHY_MODE_USB_DEVICE;
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new_role = USB_ROLE_DEVICE;
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devctl &= ~MUSB_DEVCTL_SESSION;
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musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
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if (glue->role == USB_ROLE_NONE)
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phy_power_on(glue->phy);
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MUSB_DEV_MODE(musb);
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break;
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case USB_ROLE_NONE:
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glue->phy_mode = PHY_MODE_USB_OTG;
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new_role = USB_ROLE_NONE;
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devctl &= ~MUSB_DEVCTL_SESSION;
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musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
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if (glue->role != USB_ROLE_NONE)
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phy_power_off(glue->phy);
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break;
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default:
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dev_err(glue->dev, "Invalid State\n");
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return -EINVAL;
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}
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glue->role = new_role;
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phy_set_mode(glue->phy, glue->phy_mode);
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return 0;
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}
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static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role)
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{
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return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role);
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}
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static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw)
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{
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struct mtk_glue *glue = usb_role_switch_get_drvdata(sw);
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return glue->role;
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}
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static int mtk_otg_switch_init(struct mtk_glue *glue)
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{
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struct usb_role_switch_desc role_sx_desc = { 0 };
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role_sx_desc.set = musb_usb_role_sx_set;
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role_sx_desc.get = musb_usb_role_sx_get;
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role_sx_desc.allow_userspace_control = true;
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role_sx_desc.fwnode = dev_fwnode(glue->dev);
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role_sx_desc.driver_data = glue;
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glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc);
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return PTR_ERR_OR_ZERO(glue->role_sw);
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}
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static void mtk_otg_switch_exit(struct mtk_glue *glue)
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{
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return usb_role_switch_unregister(glue->role_sw);
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}
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static irqreturn_t generic_interrupt(int irq, void *__hci)
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{
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unsigned long flags;
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irqreturn_t retval = IRQ_NONE;
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struct musb *musb = __hci;
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spin_lock_irqsave(&musb->lock, flags);
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musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB);
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musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX);
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musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX);
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if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) {
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/* ep0 FADDR must be 0 when (re)entering peripheral mode */
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musb_ep_select(musb->mregs, 0);
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musb_writeb(musb->mregs, MUSB_FADDR, 0);
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}
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if (musb->int_usb || musb->int_tx || musb->int_rx)
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retval = musb_interrupt(musb);
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spin_unlock_irqrestore(&musb->lock, flags);
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return retval;
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}
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static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id)
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{
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irqreturn_t retval = IRQ_NONE;
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struct musb *musb = (struct musb *)dev_id;
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u32 l1_ints;
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l1_ints = musb_readl(musb->mregs, USB_L1INTS) &
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musb_readl(musb->mregs, USB_L1INTM);
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if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS))
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retval = generic_interrupt(irq, musb);
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#if defined(CONFIG_USB_INVENTRA_DMA)
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if (l1_ints & DMA_INT_STATUS)
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retval = dma_controller_irq(irq, musb->dma_controller);
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#endif
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return retval;
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}
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static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset)
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{
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return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum;
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}
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static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset)
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{
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u8 data;
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/* W1C */
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data = musb_readb(addr, offset);
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musb_writeb(addr, offset, data);
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return data;
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}
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static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset)
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{
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u16 data;
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/* W1C */
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data = musb_readw(addr, offset);
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musb_writew(addr, offset, data);
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return data;
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}
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static int mtk_musb_set_mode(struct musb *musb, u8 mode)
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{
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struct device *dev = musb->controller;
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struct mtk_glue *glue = dev_get_drvdata(dev->parent);
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enum phy_mode new_mode;
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enum usb_role new_role;
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switch (mode) {
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case MUSB_HOST:
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new_mode = PHY_MODE_USB_HOST;
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new_role = USB_ROLE_HOST;
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break;
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case MUSB_PERIPHERAL:
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new_mode = PHY_MODE_USB_DEVICE;
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new_role = USB_ROLE_DEVICE;
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break;
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case MUSB_OTG:
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new_mode = PHY_MODE_USB_OTG;
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new_role = USB_ROLE_NONE;
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break;
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default:
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dev_err(glue->dev, "Invalid mode request\n");
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return -EINVAL;
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}
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if (glue->phy_mode == new_mode)
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return 0;
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if (musb->port_mode != MUSB_OTG) {
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dev_err(glue->dev, "Does not support changing modes\n");
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return -EINVAL;
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}
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mtk_otg_switch_set(glue, new_role);
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return 0;
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}
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static int mtk_musb_init(struct musb *musb)
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{
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struct device *dev = musb->controller;
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struct mtk_glue *glue = dev_get_drvdata(dev->parent);
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int ret;
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glue->musb = musb;
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musb->phy = glue->phy;
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musb->xceiv = glue->xceiv;
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musb->is_host = false;
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musb->isr = mtk_musb_interrupt;
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/* Set TX/RX toggle enable */
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musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN);
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musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN);
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if (musb->port_mode == MUSB_OTG) {
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ret = mtk_otg_switch_init(glue);
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if (ret)
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return ret;
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}
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ret = phy_init(glue->phy);
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if (ret)
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goto err_phy_init;
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ret = phy_power_on(glue->phy);
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if (ret)
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goto err_phy_power_on;
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phy_set_mode(glue->phy, glue->phy_mode);
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#if defined(CONFIG_USB_INVENTRA_DMA)
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musb_writel(musb->mregs, MUSB_HSDMA_INTR,
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DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK);
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#endif
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musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS |
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USBCOM_INT_STATUS | DMA_INT_STATUS);
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return 0;
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err_phy_power_on:
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phy_exit(glue->phy);
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err_phy_init:
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mtk_otg_switch_exit(glue);
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return ret;
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}
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static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out)
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{
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struct musb *musb = qh->hw_ep->musb;
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u8 epnum = qh->hw_ep->epnum;
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u16 toggle;
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toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG);
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return toggle & (1 << epnum);
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}
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static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb)
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{
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struct musb *musb = qh->hw_ep->musb;
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u8 epnum = qh->hw_ep->epnum;
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u16 value, toggle;
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toggle = usb_gettoggle(urb->dev, qh->epnum, is_out);
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if (is_out) {
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value = musb_readw(musb->mregs, MUSB_TXTOG);
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value |= toggle << epnum;
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musb_writew(musb->mregs, MUSB_TXTOG, value);
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} else {
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value = musb_readw(musb->mregs, MUSB_RXTOG);
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value |= toggle << epnum;
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musb_writew(musb->mregs, MUSB_RXTOG, value);
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}
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return 0;
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}
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static int mtk_musb_exit(struct musb *musb)
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{
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struct device *dev = musb->controller;
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struct mtk_glue *glue = dev_get_drvdata(dev->parent);
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mtk_otg_switch_exit(glue);
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phy_power_off(glue->phy);
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phy_exit(glue->phy);
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clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, glue->clks);
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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return 0;
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}
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static const struct musb_platform_ops mtk_musb_ops = {
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.quirks = MUSB_DMA_INVENTRA,
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.init = mtk_musb_init,
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.get_toggle = mtk_musb_get_toggle,
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.set_toggle = mtk_musb_set_toggle,
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.exit = mtk_musb_exit,
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#ifdef CONFIG_USB_INVENTRA_DMA
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.dma_init = musbhs_dma_controller_create_noirq,
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.dma_exit = musbhs_dma_controller_destroy,
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#endif
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.clearb = mtk_musb_clearb,
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.clearw = mtk_musb_clearw,
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.busctl_offset = mtk_musb_busctl_offset,
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.set_mode = mtk_musb_set_mode,
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};
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#define MTK_MUSB_MAX_EP_NUM 8
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#define MTK_MUSB_RAM_BITS 11
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static struct musb_fifo_cfg mtk_musb_mode_cfg[] = {
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{ .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, },
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{ .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, },
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{ .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, },
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};
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static const struct musb_hdrc_config mtk_musb_hdrc_config = {
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.fifo_cfg = mtk_musb_mode_cfg,
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.fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg),
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.multipoint = true,
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.dyn_fifo = true,
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.num_eps = MTK_MUSB_MAX_EP_NUM,
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.ram_bits = MTK_MUSB_RAM_BITS,
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};
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static const struct platform_device_info mtk_dev_info = {
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.name = "musb-hdrc",
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.id = PLATFORM_DEVID_AUTO,
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.dma_mask = DMA_BIT_MASK(32),
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};
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static int mtk_musb_probe(struct platform_device *pdev)
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{
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struct musb_hdrc_platform_data *pdata;
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struct mtk_glue *glue;
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struct platform_device_info pinfo;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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int ret;
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glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
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if (!glue)
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return -ENOMEM;
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glue->dev = dev;
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pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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ret = of_platform_populate(np, NULL, NULL, dev);
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if (ret) {
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dev_err(dev, "failed to create child devices at %p\n", np);
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return ret;
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}
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ret = mtk_musb_clks_get(glue);
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if (ret)
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return ret;
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pdata->config = &mtk_musb_hdrc_config;
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pdata->platform_ops = &mtk_musb_ops;
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pdata->mode = usb_get_dr_mode(dev);
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if (IS_ENABLED(CONFIG_USB_MUSB_HOST))
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pdata->mode = USB_DR_MODE_HOST;
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else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET))
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pdata->mode = USB_DR_MODE_PERIPHERAL;
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switch (pdata->mode) {
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case USB_DR_MODE_HOST:
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glue->phy_mode = PHY_MODE_USB_HOST;
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glue->role = USB_ROLE_HOST;
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break;
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case USB_DR_MODE_PERIPHERAL:
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glue->phy_mode = PHY_MODE_USB_DEVICE;
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glue->role = USB_ROLE_DEVICE;
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break;
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case USB_DR_MODE_OTG:
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glue->phy_mode = PHY_MODE_USB_OTG;
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glue->role = USB_ROLE_NONE;
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break;
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default:
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dev_err(&pdev->dev, "Error 'dr_mode' property\n");
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return -EINVAL;
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}
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glue->phy = devm_of_phy_get_by_index(dev, np, 0);
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if (IS_ERR(glue->phy)) {
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dev_err(dev, "fail to getting phy %ld\n",
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PTR_ERR(glue->phy));
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return PTR_ERR(glue->phy);
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}
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|
|
glue->usb_phy = usb_phy_generic_register();
|
|
if (IS_ERR(glue->usb_phy)) {
|
|
dev_err(dev, "fail to registering usb-phy %ld\n",
|
|
PTR_ERR(glue->usb_phy));
|
|
return PTR_ERR(glue->usb_phy);
|
|
}
|
|
|
|
glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
|
|
if (IS_ERR(glue->xceiv)) {
|
|
ret = PTR_ERR(glue->xceiv);
|
|
dev_err(dev, "fail to getting usb-phy %d\n", ret);
|
|
goto err_unregister_usb_phy;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, glue);
|
|
pm_runtime_enable(dev);
|
|
pm_runtime_get_sync(dev);
|
|
|
|
ret = clk_bulk_prepare_enable(MTK_MUSB_CLKS_NUM, glue->clks);
|
|
if (ret)
|
|
goto err_enable_clk;
|
|
|
|
pinfo = mtk_dev_info;
|
|
pinfo.parent = dev;
|
|
pinfo.res = pdev->resource;
|
|
pinfo.num_res = pdev->num_resources;
|
|
pinfo.data = pdata;
|
|
pinfo.size_data = sizeof(*pdata);
|
|
pinfo.fwnode = of_fwnode_handle(np);
|
|
pinfo.of_node_reused = true;
|
|
|
|
glue->musb_pdev = platform_device_register_full(&pinfo);
|
|
if (IS_ERR(glue->musb_pdev)) {
|
|
ret = PTR_ERR(glue->musb_pdev);
|
|
dev_err(dev, "failed to register musb device: %d\n", ret);
|
|
goto err_device_register;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_device_register:
|
|
clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, glue->clks);
|
|
err_enable_clk:
|
|
pm_runtime_put_sync(dev);
|
|
pm_runtime_disable(dev);
|
|
err_unregister_usb_phy:
|
|
usb_phy_generic_unregister(glue->usb_phy);
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_musb_remove(struct platform_device *pdev)
|
|
{
|
|
struct mtk_glue *glue = platform_get_drvdata(pdev);
|
|
struct platform_device *usb_phy = glue->usb_phy;
|
|
|
|
platform_device_unregister(glue->musb_pdev);
|
|
usb_phy_generic_unregister(usb_phy);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id mtk_musb_match[] = {
|
|
{.compatible = "mediatek,mtk-musb",},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, mtk_musb_match);
|
|
#endif
|
|
|
|
static struct platform_driver mtk_musb_driver = {
|
|
.probe = mtk_musb_probe,
|
|
.remove = mtk_musb_remove,
|
|
.driver = {
|
|
.name = "musb-mtk",
|
|
.of_match_table = of_match_ptr(mtk_musb_match),
|
|
},
|
|
};
|
|
|
|
module_platform_driver(mtk_musb_driver);
|
|
|
|
MODULE_DESCRIPTION("MediaTek MUSB Glue Layer");
|
|
MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>");
|
|
MODULE_LICENSE("GPL v2");
|