Srinivas Pandruvada 71b21bd7f6 platform/x86: ISST: Add Intel Speed Select mailbox interface via MSRs ... Add an IOCTL to send mailbox commands to PUNIT using PUNIT MSRs for mailbox. Some CPU models don't have PCI device, so need to use MSRs. A limited set of mailbox commands can be sent to PUNIT. This MMIO interface is used by the intel-speed-select tool under tools/x86/power to enumerate and control Intel Speed Select features. The MBOX commands ids and semantics of the message can be checked from the source code of the tool. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>		2019-07-02 18:41:16 +03:00
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chrome	- Core Frameworks	2019-05-14 10:39:08 -07:00
goldfish	mm/gup: change GUP fast to use flags rather than a write 'bool'	2019-05-14 09:47:46 -07:00
mellanox	platform/mellanox: mlxreg-hotplug: Add devm_free_irq call to remove flow	2019-06-12 11:54:17 +03:00
mips	MIPS: Loongson: Add Loongson-3A R2.1 basic support	2018-11-19 15:20:31 -08:00
olpc	Platform: OLPC: Add a config menu category for XO 1.75	2019-06-12 11:53:20 +03:00
x86	platform/x86: ISST: Add Intel Speed Select mailbox interface via MSRs	2019-07-02 18:41:16 +03:00
Kconfig	Platform: OLPC: Add XO-1.75 EC driver	2019-05-20 17:27:08 +03:00
Makefile	Platform: OLPC: Add XO-1.75 EC driver	2019-05-20 17:27:08 +03:00