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d9d3490c48
Up until now, the necessary scm availability check has not been
performed, leading to possible null pointer dereferences (which did
happen for me on RB1).
Fix that.
Fixes: 53bca371cd ("thermal/drivers/qcom: Add support for LMh driver")
Cc: <stable@vger.kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20240308-topic-rb1_lmh-v2-2-bac3914b0fe3@linaro.org
245 lines
6.4 KiB
C
245 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021, Linaro Limited. All rights reserved.
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/firmware/qcom/qcom_scm.h>
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#define LMH_NODE_DCVS 0x44435653
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#define LMH_CLUSTER0_NODE_ID 0x6370302D
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#define LMH_CLUSTER1_NODE_ID 0x6370312D
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#define LMH_SUB_FN_THERMAL 0x54484D4C
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#define LMH_SUB_FN_CRNT 0x43524E54
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#define LMH_SUB_FN_REL 0x52454C00
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#define LMH_SUB_FN_BCL 0x42434C00
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#define LMH_ALGO_MODE_ENABLE 0x454E424C
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#define LMH_TH_HI_THRESHOLD 0x48494748
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#define LMH_TH_LOW_THRESHOLD 0x4C4F5700
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#define LMH_TH_ARM_THRESHOLD 0x41524D00
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#define LMH_REG_DCVS_INTR_CLR 0x8
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#define LMH_ENABLE_ALGOS 1
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struct lmh_hw_data {
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void __iomem *base;
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struct irq_domain *domain;
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int irq;
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};
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static irqreturn_t lmh_handle_irq(int hw_irq, void *data)
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{
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struct lmh_hw_data *lmh_data = data;
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int irq = irq_find_mapping(lmh_data->domain, 0);
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/* Call the cpufreq driver to handle the interrupt */
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if (irq)
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generic_handle_irq(irq);
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return IRQ_HANDLED;
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}
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static void lmh_enable_interrupt(struct irq_data *d)
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{
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struct lmh_hw_data *lmh_data = irq_data_get_irq_chip_data(d);
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/* Clear the existing interrupt */
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writel(0xff, lmh_data->base + LMH_REG_DCVS_INTR_CLR);
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enable_irq(lmh_data->irq);
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}
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static void lmh_disable_interrupt(struct irq_data *d)
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{
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struct lmh_hw_data *lmh_data = irq_data_get_irq_chip_data(d);
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disable_irq_nosync(lmh_data->irq);
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}
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static struct irq_chip lmh_irq_chip = {
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.name = "lmh",
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.irq_enable = lmh_enable_interrupt,
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.irq_disable = lmh_disable_interrupt
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};
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static int lmh_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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{
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struct lmh_hw_data *lmh_data = d->host_data;
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irq_set_chip_and_handler(irq, &lmh_irq_chip, handle_simple_irq);
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irq_set_chip_data(irq, lmh_data);
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return 0;
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}
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static const struct irq_domain_ops lmh_irq_ops = {
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.map = lmh_irq_map,
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.xlate = irq_domain_xlate_onecell,
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};
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static int lmh_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct device_node *cpu_node;
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struct lmh_hw_data *lmh_data;
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int temp_low, temp_high, temp_arm, cpu_id, ret;
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unsigned int enable_alg;
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u32 node_id;
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if (!qcom_scm_is_available())
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return -EPROBE_DEFER;
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lmh_data = devm_kzalloc(dev, sizeof(*lmh_data), GFP_KERNEL);
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if (!lmh_data)
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return -ENOMEM;
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lmh_data->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(lmh_data->base))
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return PTR_ERR(lmh_data->base);
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cpu_node = of_parse_phandle(np, "cpus", 0);
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if (!cpu_node)
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return -EINVAL;
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cpu_id = of_cpu_node_to_id(cpu_node);
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of_node_put(cpu_node);
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ret = of_property_read_u32(np, "qcom,lmh-temp-high-millicelsius", &temp_high);
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if (ret) {
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dev_err(dev, "missing qcom,lmh-temp-high-millicelsius property\n");
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return ret;
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}
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ret = of_property_read_u32(np, "qcom,lmh-temp-low-millicelsius", &temp_low);
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if (ret) {
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dev_err(dev, "missing qcom,lmh-temp-low-millicelsius property\n");
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return ret;
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}
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ret = of_property_read_u32(np, "qcom,lmh-temp-arm-millicelsius", &temp_arm);
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if (ret) {
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dev_err(dev, "missing qcom,lmh-temp-arm-millicelsius property\n");
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return ret;
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}
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/*
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* Only sdm845 has lmh hardware currently enabled from hlos. If this is needed
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* for other platforms, revisit this to check if the <cpu-id, node-id> should be part
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* of a dt match table.
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*/
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if (cpu_id == 0) {
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node_id = LMH_CLUSTER0_NODE_ID;
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} else if (cpu_id == 4) {
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node_id = LMH_CLUSTER1_NODE_ID;
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} else {
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dev_err(dev, "Wrong CPU id associated with LMh node\n");
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return -EINVAL;
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}
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if (!qcom_scm_lmh_dcvsh_available())
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return -EINVAL;
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enable_alg = (uintptr_t)of_device_get_match_data(dev);
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if (enable_alg) {
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ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1,
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LMH_NODE_DCVS, node_id, 0);
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if (ret)
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dev_err(dev, "Error %d enabling current subfunction\n", ret);
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ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1,
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LMH_NODE_DCVS, node_id, 0);
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if (ret)
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dev_err(dev, "Error %d enabling reliability subfunction\n", ret);
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ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1,
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LMH_NODE_DCVS, node_id, 0);
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if (ret)
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dev_err(dev, "Error %d enabling BCL subfunction\n", ret);
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ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1,
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LMH_NODE_DCVS, node_id, 0);
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if (ret) {
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dev_err(dev, "Error %d enabling thermal subfunction\n", ret);
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return ret;
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}
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ret = qcom_scm_lmh_profile_change(0x1);
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if (ret) {
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dev_err(dev, "Error %d changing profile\n", ret);
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return ret;
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}
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}
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/* Set default thermal trips */
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ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_ARM_THRESHOLD, temp_arm,
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LMH_NODE_DCVS, node_id, 0);
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if (ret) {
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dev_err(dev, "Error setting thermal ARM threshold%d\n", ret);
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return ret;
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}
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ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_HI_THRESHOLD, temp_high,
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LMH_NODE_DCVS, node_id, 0);
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if (ret) {
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dev_err(dev, "Error setting thermal HI threshold%d\n", ret);
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return ret;
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}
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ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_LOW_THRESHOLD, temp_low,
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LMH_NODE_DCVS, node_id, 0);
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if (ret) {
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dev_err(dev, "Error setting thermal ARM threshold%d\n", ret);
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return ret;
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}
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lmh_data->irq = platform_get_irq(pdev, 0);
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lmh_data->domain = irq_domain_add_linear(np, 1, &lmh_irq_ops, lmh_data);
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if (!lmh_data->domain) {
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dev_err(dev, "Error adding irq_domain\n");
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return -EINVAL;
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}
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/* Disable the irq and let cpufreq enable it when ready to handle the interrupt */
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irq_set_status_flags(lmh_data->irq, IRQ_NOAUTOEN);
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ret = devm_request_irq(dev, lmh_data->irq, lmh_handle_irq,
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IRQF_ONESHOT | IRQF_NO_SUSPEND,
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"lmh-irq", lmh_data);
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if (ret) {
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dev_err(dev, "Error %d registering irq %x\n", ret, lmh_data->irq);
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irq_domain_remove(lmh_data->domain);
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return ret;
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}
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return 0;
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}
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static const struct of_device_id lmh_table[] = {
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{ .compatible = "qcom,sc8180x-lmh", },
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{ .compatible = "qcom,sdm845-lmh", .data = (void *)LMH_ENABLE_ALGOS},
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{ .compatible = "qcom,sm8150-lmh", },
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{}
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};
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MODULE_DEVICE_TABLE(of, lmh_table);
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static struct platform_driver lmh_driver = {
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.probe = lmh_probe,
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.driver = {
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.name = "qcom-lmh",
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.of_match_table = lmh_table,
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.suppress_bind_attrs = true,
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},
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};
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module_platform_driver(lmh_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("QCOM LMh driver");
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