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7136d457f3
OMAP4/5 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
BIG FAT WARNING: because the DTs were so far lying by not
exposing the WUGEN HW block, kernels with this patch applied
won't have any suspend-resume facility when booted with old DTs,
and old kernels with updated DTs won't even boot.
On a platform with this patch applied, the system looks like
this:
root@bacon-fat:~# cat /proc/interrupts
CPU0 CPU1
16: 0 0 WUGEN 37 gp_timer
19: 233799 155916 GIC 27 arch_timer
23: 0 0 WUGEN 9 l3-dbg-irq
24: 1 0 WUGEN 10 l3-app-irq
27: 282 0 WUGEN 13 omap-dma-engine
44: 0 0 4ae10000.gpio 13 DMA
294: 0 0 WUGEN 20 gpmc
297: 506 0 WUGEN 56 48070000.i2c
298: 0 0 WUGEN 57 48072000.i2c
299: 0 0 WUGEN 61 48060000.i2c
300: 0 0 WUGEN 62 4807a000.i2c
301: 8 0 WUGEN 60 4807c000.i2c
308: 2439 0 WUGEN 74 OMAP UART2
312: 362 0 WUGEN 83 mmc2
313: 502 0 WUGEN 86 mmc0
314: 13 0 WUGEN 94 mmc1
350: 0 0 PRCM pinctrl, pinctrl
406: 35155709 0 GIC 109 ehci_hcd:usb1
407: 0 0 WUGEN 7 palmas
409: 0 0 WUGEN 119 twl6040
410: 0 0 twl6040 5 twl6040_irq_ready
411: 0 0 twl6040 0 twl6040_irq_th
IPI0: 0 1 CPU wakeup interrupts
IPI1: 0 0 Timer broadcast interrupts
IPI2: 95334 902334 Rescheduling interrupts
IPI3: 0 0 Function call interrupts
IPI4: 479 648 Single function call interrupts
IPI5: 0 0 CPU stop interrupts
IPI6: 0 0 IRQ work interrupts
IPI7: 0 0 completion interrupts
Err: 0
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
980 lines
23 KiB
Plaintext
980 lines
23 KiB
Plaintext
/*
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* Device Tree Source for AM4372 SoC
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,am4372", "ti,am43";
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interrupt-parent = <&wakeupgen>;
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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serial0 = &uart0;
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ethernet0 = &cpsw_emac0;
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ethernet1 = &cpsw_emac1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu: cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0>;
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clocks = <&dpll_mpu_ck>;
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clock-names = "cpu";
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clock-latency = <300000>; /* From omap-cpufreq driver */
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};
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};
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gic: interrupt-controller@48241000 {
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compatible = "arm,cortex-a9-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x48241000 0x1000>,
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<0x48240100 0x0100>;
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interrupt-parent = <&gic>;
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};
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wakeupgen: interrupt-controller@48281000 {
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compatible = "ti,omap4-wugen-mpu";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x48281000 0x1000>;
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interrupt-parent = <&gic>;
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};
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l2-cache-controller@48242000 {
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compatible = "arm,pl310-cache";
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reg = <0x48242000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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am43xx_control_module: control_module@4a002000 {
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compatible = "syscon";
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reg = <0x44e10000 0x7f4>;
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};
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am43xx_pinmux: pinmux@44e10800 {
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compatible = "ti,am437-padconf", "pinctrl-single";
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reg = <0x44e10800 0x31c>;
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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ocp {
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compatible = "ti,am4372-l3-noc", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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reg = <0x44000000 0x400000
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0x44800000 0x400000>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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prcm: prcm@44df0000 {
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compatible = "ti,am4-prcm";
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reg = <0x44df0000 0x11000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scrm: scrm@44e10000 {
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compatible = "ti,am4-scrm";
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reg = <0x44e10000 0x2000>;
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scrm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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scrm_clockdomains: clockdomains {
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};
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};
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edma: edma@49000000 {
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compatible = "ti,edma3";
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ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
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reg = <0x49000000 0x10000>,
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<0x44e10f90 0x10>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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};
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uart0: serial@44e09000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x44e09000 0x2000>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart1";
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};
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uart1: serial@48022000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x48022000 0x2000>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart2";
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status = "disabled";
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};
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uart2: serial@48024000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x48024000 0x2000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart3";
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status = "disabled";
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};
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uart3: serial@481a6000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x481a6000 0x2000>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart4";
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status = "disabled";
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};
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uart4: serial@481a8000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x481a8000 0x2000>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart5";
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status = "disabled";
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};
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uart5: serial@481aa000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x481aa000 0x2000>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart6";
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status = "disabled";
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};
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mailbox: mailbox@480C8000 {
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compatible = "ti,omap4-mailbox";
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reg = <0x480C8000 0x200>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mailbox";
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#mbox-cells = <1>;
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <8>;
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mbox_wkupm3: wkup_m3 {
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ti,mbox-tx = <0 0 0>;
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ti,mbox-rx = <0 0 3>;
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};
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};
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timer1: timer@44e31000 {
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compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
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reg = <0x44e31000 0x400>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-alwon;
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ti,hwmods = "timer1";
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};
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timer2: timer@48040000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48040000 0x400>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer2";
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};
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timer3: timer@48042000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48042000 0x400>;
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interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer3";
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status = "disabled";
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};
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timer4: timer@48044000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48044000 0x400>;
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer4";
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status = "disabled";
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};
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timer5: timer@48046000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48046000 0x400>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer5";
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status = "disabled";
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};
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timer6: timer@48048000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48048000 0x400>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer6";
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status = "disabled";
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};
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timer7: timer@4804a000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x4804a000 0x400>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer7";
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status = "disabled";
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};
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timer8: timer@481c1000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x481c1000 0x400>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer8";
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status = "disabled";
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};
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timer9: timer@4833d000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x4833d000 0x400>;
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interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer9";
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status = "disabled";
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};
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timer10: timer@4833f000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x4833f000 0x400>;
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer10";
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status = "disabled";
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};
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timer11: timer@48341000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48341000 0x400>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer11";
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status = "disabled";
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};
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counter32k: counter@44e86000 {
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compatible = "ti,am4372-counter32k","ti,omap-counter32k";
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reg = <0x44e86000 0x40>;
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ti,hwmods = "counter_32k";
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};
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rtc: rtc@44e3e000 {
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compatible = "ti,am4372-rtc","ti,da830-rtc";
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reg = <0x44e3e000 0x1000>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "rtc";
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status = "disabled";
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};
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wdt: wdt@44e35000 {
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compatible = "ti,am4372-wdt","ti,omap3-wdt";
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reg = <0x44e35000 0x1000>;
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "wd_timer2";
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};
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gpio0: gpio@44e07000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x44e07000 0x1000>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio1";
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status = "disabled";
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};
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gpio1: gpio@4804c000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x4804c000 0x1000>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio2";
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status = "disabled";
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};
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gpio2: gpio@481ac000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x481ac000 0x1000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio3";
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status = "disabled";
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};
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gpio3: gpio@481ae000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x481ae000 0x1000>;
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio4";
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status = "disabled";
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};
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gpio4: gpio@48320000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x48320000 0x1000>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio5";
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status = "disabled";
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};
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gpio5: gpio@48322000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x48322000 0x1000>;
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interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio6";
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status = "disabled";
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};
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hwspinlock: spinlock@480ca000 {
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compatible = "ti,omap4-hwspinlock";
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reg = <0x480ca000 0x1000>;
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ti,hwmods = "spinlock";
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#hwlock-cells = <1>;
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};
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i2c0: i2c@44e0b000 {
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compatible = "ti,am4372-i2c","ti,omap4-i2c";
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reg = <0x44e0b000 0x1000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "i2c1";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@4802a000 {
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compatible = "ti,am4372-i2c","ti,omap4-i2c";
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reg = <0x4802a000 0x1000>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "i2c2";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@4819c000 {
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compatible = "ti,am4372-i2c","ti,omap4-i2c";
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reg = <0x4819c000 0x1000>;
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "i2c3";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi0: spi@48030000 {
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compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
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reg = <0x48030000 0x400>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "spi0";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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mmc1: mmc@48060000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x48060000 0x1000>;
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ti,hwmods = "mmc1";
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ti,dual-volt;
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ti,needs-special-reset;
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dmas = <&edma 24
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&edma 25>;
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dma-names = "tx", "rx";
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmc2: mmc@481d8000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x481d8000 0x1000>;
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ti,hwmods = "mmc2";
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ti,needs-special-reset;
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dmas = <&edma 2
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&edma 3>;
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dma-names = "tx", "rx";
|
|
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mmc3: mmc@47810000 {
|
|
compatible = "ti,omap4-hsmmc";
|
|
reg = <0x47810000 0x1000>;
|
|
ti,hwmods = "mmc3";
|
|
ti,needs-special-reset;
|
|
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi1: spi@481a0000 {
|
|
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
|
|
reg = <0x481a0000 0x400>;
|
|
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "spi1";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi2: spi@481a2000 {
|
|
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
|
|
reg = <0x481a2000 0x400>;
|
|
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "spi2";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi3: spi@481a4000 {
|
|
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
|
|
reg = <0x481a4000 0x400>;
|
|
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "spi3";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi4: spi@48345000 {
|
|
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
|
|
reg = <0x48345000 0x400>;
|
|
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "spi4";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mac: ethernet@4a100000 {
|
|
compatible = "ti,am4372-cpsw","ti,cpsw";
|
|
reg = <0x4a100000 0x800
|
|
0x4a101200 0x100>;
|
|
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
|
|
GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
|
|
GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
|
|
GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ti,hwmods = "cpgmac0";
|
|
clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
|
|
clock-names = "fck", "cpts";
|
|
status = "disabled";
|
|
cpdma_channels = <8>;
|
|
ale_entries = <1024>;
|
|
bd_ram_size = <0x2000>;
|
|
no_bd_ram = <0>;
|
|
rx_descs = <64>;
|
|
mac_control = <0x20>;
|
|
slaves = <2>;
|
|
active_slave = <0>;
|
|
cpts_clock_mult = <0x80000000>;
|
|
cpts_clock_shift = <29>;
|
|
ranges;
|
|
|
|
davinci_mdio: mdio@4a101000 {
|
|
compatible = "ti,am4372-mdio","ti,davinci_mdio";
|
|
reg = <0x4a101000 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "davinci_mdio";
|
|
bus_freq = <1000000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
cpsw_emac0: slave@4a100200 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
cpsw_emac1: slave@4a100300 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
phy_sel: cpsw-phy-sel@44e10650 {
|
|
compatible = "ti,am43xx-cpsw-phy-sel";
|
|
reg= <0x44e10650 0x4>;
|
|
reg-names = "gmii-sel";
|
|
};
|
|
};
|
|
|
|
epwmss0: epwmss@48300000 {
|
|
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
|
reg = <0x48300000 0x10>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "epwmss0";
|
|
status = "disabled";
|
|
|
|
ecap0: ecap@48300100 {
|
|
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300100 0x80>;
|
|
ti,hwmods = "ecap0";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm0: ehrpwm@48300200 {
|
|
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300200 0x80>;
|
|
ti,hwmods = "ehrpwm0";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss1: epwmss@48302000 {
|
|
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
|
reg = <0x48302000 0x10>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "epwmss1";
|
|
status = "disabled";
|
|
|
|
ecap1: ecap@48302100 {
|
|
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302100 0x80>;
|
|
ti,hwmods = "ecap1";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm1: ehrpwm@48302200 {
|
|
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302200 0x80>;
|
|
ti,hwmods = "ehrpwm1";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss2: epwmss@48304000 {
|
|
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
|
reg = <0x48304000 0x10>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "epwmss2";
|
|
status = "disabled";
|
|
|
|
ecap2: ecap@48304100 {
|
|
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304100 0x80>;
|
|
ti,hwmods = "ecap2";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm2: ehrpwm@48304200 {
|
|
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304200 0x80>;
|
|
ti,hwmods = "ehrpwm2";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss3: epwmss@48306000 {
|
|
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
|
reg = <0x48306000 0x10>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "epwmss3";
|
|
status = "disabled";
|
|
|
|
ehrpwm3: ehrpwm@48306200 {
|
|
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48306200 0x80>;
|
|
ti,hwmods = "ehrpwm3";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss4: epwmss@48308000 {
|
|
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
|
reg = <0x48308000 0x10>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "epwmss4";
|
|
status = "disabled";
|
|
|
|
ehrpwm4: ehrpwm@48308200 {
|
|
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48308200 0x80>;
|
|
ti,hwmods = "ehrpwm4";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss5: epwmss@4830a000 {
|
|
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
|
reg = <0x4830a000 0x10>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "epwmss5";
|
|
status = "disabled";
|
|
|
|
ehrpwm5: ehrpwm@4830a200 {
|
|
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x4830a200 0x80>;
|
|
ti,hwmods = "ehrpwm5";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
tscadc: tscadc@44e0d000 {
|
|
compatible = "ti,am3359-tscadc";
|
|
reg = <0x44e0d000 0x1000>;
|
|
ti,hwmods = "adc_tsc";
|
|
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&adc_tsc_fck>;
|
|
clock-names = "fck";
|
|
status = "disabled";
|
|
|
|
tsc {
|
|
compatible = "ti,am3359-tsc";
|
|
};
|
|
|
|
adc {
|
|
#io-channel-cells = <1>;
|
|
compatible = "ti,am3359-adc";
|
|
};
|
|
|
|
};
|
|
|
|
sham: sham@53100000 {
|
|
compatible = "ti,omap5-sham";
|
|
ti,hwmods = "sham";
|
|
reg = <0x53100000 0x300>;
|
|
dmas = <&edma 36>;
|
|
dma-names = "rx";
|
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
aes: aes@53501000 {
|
|
compatible = "ti,omap4-aes";
|
|
ti,hwmods = "aes";
|
|
reg = <0x53501000 0xa0>;
|
|
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
|
dmas = <&edma 6
|
|
&edma 5>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
des: des@53701000 {
|
|
compatible = "ti,omap4-des";
|
|
ti,hwmods = "des";
|
|
reg = <0x53701000 0xa0>;
|
|
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
|
|
dmas = <&edma 34
|
|
&edma 33>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp0: mcasp@48038000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp0";
|
|
reg = <0x48038000 0x2000>,
|
|
<0x46000000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <80>, <81>;
|
|
interrupt-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 8>,
|
|
<&edma 9>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp1: mcasp@4803C000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp1";
|
|
reg = <0x4803C000 0x2000>,
|
|
<0x46400000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <82>, <83>;
|
|
interrupt-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 10>,
|
|
<&edma 11>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
elm: elm@48080000 {
|
|
compatible = "ti,am3352-elm";
|
|
reg = <0x48080000 0x2000>;
|
|
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "elm";
|
|
clocks = <&l4ls_gclk>;
|
|
clock-names = "fck";
|
|
status = "disabled";
|
|
};
|
|
|
|
gpmc: gpmc@50000000 {
|
|
compatible = "ti,am3352-gpmc";
|
|
ti,hwmods = "gpmc";
|
|
clocks = <&l3s_gclk>;
|
|
clock-names = "fck";
|
|
reg = <0x50000000 0x2000>;
|
|
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
|
gpmc,num-cs = <7>;
|
|
gpmc,num-waitpins = <2>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
am43xx_control_usb2phy1: control-phy@44e10620 {
|
|
compatible = "ti,control-phy-usb2-am437";
|
|
reg = <0x44e10620 0x4>;
|
|
reg-names = "power";
|
|
};
|
|
|
|
am43xx_control_usb2phy2: control-phy@0x44e10628 {
|
|
compatible = "ti,control-phy-usb2-am437";
|
|
reg = <0x44e10628 0x4>;
|
|
reg-names = "power";
|
|
};
|
|
|
|
ocp2scp0: ocp2scp@483a8000 {
|
|
compatible = "ti,omap-ocp2scp";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "ocp2scp0";
|
|
|
|
usb2_phy1: phy@483a8000 {
|
|
compatible = "ti,am437x-usb2";
|
|
reg = <0x483a8000 0x8000>;
|
|
ctrl-module = <&am43xx_control_usb2phy1>;
|
|
clocks = <&usb_phy0_always_on_clk32k>,
|
|
<&usb_otg_ss0_refclk960m>;
|
|
clock-names = "wkupclk", "refclk";
|
|
#phy-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
ocp2scp1: ocp2scp@483e8000 {
|
|
compatible = "ti,omap-ocp2scp";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
ti,hwmods = "ocp2scp1";
|
|
|
|
usb2_phy2: phy@483e8000 {
|
|
compatible = "ti,am437x-usb2";
|
|
reg = <0x483e8000 0x8000>;
|
|
ctrl-module = <&am43xx_control_usb2phy2>;
|
|
clocks = <&usb_phy1_always_on_clk32k>,
|
|
<&usb_otg_ss1_refclk960m>;
|
|
clock-names = "wkupclk", "refclk";
|
|
#phy-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
dwc3_1: omap_dwc3@48380000 {
|
|
compatible = "ti,am437x-dwc3";
|
|
ti,hwmods = "usb_otg_ss0";
|
|
reg = <0x48380000 0x10000>;
|
|
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
utmi-mode = <1>;
|
|
ranges;
|
|
|
|
usb1: usb@48390000 {
|
|
compatible = "synopsys,dwc3";
|
|
reg = <0x48390000 0x10000>;
|
|
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
|
phys = <&usb2_phy1>;
|
|
phy-names = "usb2-phy";
|
|
maximum-speed = "high-speed";
|
|
dr_mode = "otg";
|
|
status = "disabled";
|
|
snps,dis_u3_susphy_quirk;
|
|
snps,dis_u2_susphy_quirk;
|
|
};
|
|
};
|
|
|
|
dwc3_2: omap_dwc3@483c0000 {
|
|
compatible = "ti,am437x-dwc3";
|
|
ti,hwmods = "usb_otg_ss1";
|
|
reg = <0x483c0000 0x10000>;
|
|
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
utmi-mode = <1>;
|
|
ranges;
|
|
|
|
usb2: usb@483d0000 {
|
|
compatible = "synopsys,dwc3";
|
|
reg = <0x483d0000 0x10000>;
|
|
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
|
phys = <&usb2_phy2>;
|
|
phy-names = "usb2-phy";
|
|
maximum-speed = "high-speed";
|
|
dr_mode = "otg";
|
|
status = "disabled";
|
|
snps,dis_u3_susphy_quirk;
|
|
snps,dis_u2_susphy_quirk;
|
|
};
|
|
};
|
|
|
|
qspi: qspi@47900000 {
|
|
compatible = "ti,am4372-qspi";
|
|
reg = <0x47900000 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "qspi";
|
|
interrupts = <0 138 0x4>;
|
|
num-cs = <4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hdq: hdq@48347000 {
|
|
compatible = "ti,am43xx-hdq";
|
|
reg = <0x48347000 0x1000>;
|
|
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&func_12m_clk>;
|
|
clock-names = "fck";
|
|
ti,hwmods = "hdq1w";
|
|
status = "disabled";
|
|
};
|
|
|
|
dss: dss@4832a000 {
|
|
compatible = "ti,omap3-dss";
|
|
reg = <0x4832a000 0x200>;
|
|
status = "disabled";
|
|
ti,hwmods = "dss_core";
|
|
clocks = <&disp_clk>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
dispc: dispc@4832a400 {
|
|
compatible = "ti,omap3-dispc";
|
|
reg = <0x4832a400 0x400>;
|
|
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "dss_dispc";
|
|
clocks = <&disp_clk>;
|
|
clock-names = "fck";
|
|
};
|
|
|
|
rfbi: rfbi@4832a800 {
|
|
compatible = "ti,omap3-rfbi";
|
|
reg = <0x4832a800 0x100>;
|
|
ti,hwmods = "dss_rfbi";
|
|
clocks = <&disp_clk>;
|
|
clock-names = "fck";
|
|
};
|
|
};
|
|
|
|
ocmcram: ocmcram@40300000 {
|
|
compatible = "mmio-sram";
|
|
reg = <0x40300000 0x40000>; /* 256k */
|
|
};
|
|
|
|
dcan0: can@481cc000 {
|
|
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
|
ti,hwmods = "d_can0";
|
|
clocks = <&dcan0_fck>;
|
|
clock-names = "fck";
|
|
reg = <0x481cc000 0x2000>;
|
|
syscon-raminit = <&am43xx_control_module 0x644 0>;
|
|
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dcan1: can@481d0000 {
|
|
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
|
ti,hwmods = "d_can1";
|
|
clocks = <&dcan1_fck>;
|
|
clock-names = "fck";
|
|
reg = <0x481d0000 0x2000>;
|
|
syscon-raminit = <&am43xx_control_module 0x644 1>;
|
|
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
vpfe0: vpfe@48326000 {
|
|
compatible = "ti,am437x-vpfe";
|
|
reg = <0x48326000 0x2000>;
|
|
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "vpfe0";
|
|
status = "disabled";
|
|
};
|
|
|
|
vpfe1: vpfe@48328000 {
|
|
compatible = "ti,am437x-vpfe";
|
|
reg = <0x48328000 0x2000>;
|
|
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
|
ti,hwmods = "vpfe1";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
/include/ "am43xx-clocks.dtsi"
|