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As of Intel SDM (https://www.intel.com/sdm) version 076, there is a new Intel PT feature called Event Trace which requires 2 new packets CFE and EVD. Add them to the packet decoder and packet decoder test. Committer notes: I got the "Intel® 64 and IA-32 architectures software developer’s manual combined volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D, and 4" PDF at: https://cdrdv2.intel.com/v1/dl/getContent/671200 And these new packets are described in page 3951: <quote> 32.2.4 Event Trace is a capability that exposes details about the asynchronous events, when they are generated, and when their corresponding software event handler completes execution. These include: o Interrupts, including NMI and SMI, including the interrupt vector when defined. o Faults, exceptions including the fault vector. — Page faults additionally include the page fault address, when in context. o Event handler returns, including IRET and RSM. o VM exits and VM entries.¹ — VM exits include the values written to the “exit reason” and “exit qualification” VMCS fields. INIT and SIPI events. o TSX aborts, including the abort status returned for the RTM instructions. o Shutdown. Additionally, it provides indication of the status of the Interrupt Flag (IF), to indicate when interrupts are masked. </quote> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Link: https://lore.kernel.org/r/20220124084201.2699795-4-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
93 lines
2.0 KiB
C
93 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* intel_pt_pkt_decoder.h: Intel Processor Trace support
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* Copyright (c) 2013-2014, Intel Corporation.
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*/
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#ifndef INCLUDE__INTEL_PT_PKT_DECODER_H__
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#define INCLUDE__INTEL_PT_PKT_DECODER_H__
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#include <stddef.h>
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#include <stdint.h>
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#define INTEL_PT_PKT_DESC_MAX 256
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#define INTEL_PT_NEED_MORE_BYTES -1
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#define INTEL_PT_BAD_PACKET -2
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#define INTEL_PT_PSB_STR "\002\202\002\202\002\202\002\202" \
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"\002\202\002\202\002\202\002\202"
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#define INTEL_PT_PSB_LEN 16
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#define INTEL_PT_PKT_MAX_SZ 16
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#define INTEL_PT_VMX_NR_FLAG 1
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enum intel_pt_pkt_type {
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INTEL_PT_BAD,
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INTEL_PT_PAD,
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INTEL_PT_TNT,
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INTEL_PT_TIP_PGD,
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INTEL_PT_TIP_PGE,
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INTEL_PT_TSC,
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INTEL_PT_TMA,
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INTEL_PT_MODE_EXEC,
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INTEL_PT_MODE_TSX,
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INTEL_PT_MTC,
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INTEL_PT_TIP,
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INTEL_PT_FUP,
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INTEL_PT_CYC,
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INTEL_PT_VMCS,
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INTEL_PT_PSB,
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INTEL_PT_PSBEND,
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INTEL_PT_CBR,
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INTEL_PT_TRACESTOP,
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INTEL_PT_PIP,
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INTEL_PT_OVF,
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INTEL_PT_MNT,
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INTEL_PT_PTWRITE,
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INTEL_PT_PTWRITE_IP,
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INTEL_PT_EXSTOP,
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INTEL_PT_EXSTOP_IP,
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INTEL_PT_MWAIT,
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INTEL_PT_PWRE,
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INTEL_PT_PWRX,
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INTEL_PT_BBP,
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INTEL_PT_BIP,
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INTEL_PT_BEP,
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INTEL_PT_BEP_IP,
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INTEL_PT_CFE,
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INTEL_PT_CFE_IP,
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INTEL_PT_EVD,
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};
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struct intel_pt_pkt {
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enum intel_pt_pkt_type type;
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int count;
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uint64_t payload;
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};
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/*
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* Decoding of BIP packets conflicts with single-byte TNT packets. Since BIP
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* packets only occur in the context of a block (i.e. between BBP and BEP), that
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* context must be recorded and passed to the packet decoder.
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*/
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enum intel_pt_pkt_ctx {
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INTEL_PT_NO_CTX, /* BIP packets are invalid */
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INTEL_PT_BLK_4_CTX, /* 4-byte BIP packets */
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INTEL_PT_BLK_8_CTX, /* 8-byte BIP packets */
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};
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const char *intel_pt_pkt_name(enum intel_pt_pkt_type);
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int intel_pt_get_packet(const unsigned char *buf, size_t len,
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struct intel_pt_pkt *packet,
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enum intel_pt_pkt_ctx *ctx);
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void intel_pt_upd_pkt_ctx(const struct intel_pt_pkt *packet,
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enum intel_pt_pkt_ctx *ctx);
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int intel_pt_pkt_desc(const struct intel_pt_pkt *packet, char *buf, size_t len);
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#endif
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