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2ff799d3cf
Fix to prevent sched_mc_power_saving from being exported through sysfs
for multi-scoket single core system. Max cores should be always greater than
one (1). My earlier patch that introduced fix for not exporting
'sched_mc_power_saving' on laptops broke it on multi-socket single core
system. This fix addresses issue on both laptop and multi-socket single
core system.
Below are the Test results:
1. Single socket - multi-core
Before Patch: Does not export 'sched_mc_power_saving'
After Patch: Does not export 'sched_mc_power_saving'
Result: Pass
2. Multi Socket - single core
Before Patch: exports 'sched_mc_power_saving'
After Patch: Does not export 'sched_mc_power_saving'
Result: Pass
3. Multi Socket - Multi core
Before Patch: exports 'sched_mc_power_saving'
After Patch: exports 'sched_mc_power_saving'
[ Impact: make the sched_mc_power_saving control available more consistently ]
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: Suresh B Siddha <suresh.b.siddha@intel.com>
Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <20090511143914.GB4853@dirshya.in.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
225 lines
5.5 KiB
C
225 lines
5.5 KiB
C
/*
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* Written by: Matthew Dobson, IBM Corporation
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*
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* Copyright (C) 2002, IBM Corp.
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <colpatch@us.ibm.com>
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*/
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#ifndef _ASM_X86_TOPOLOGY_H
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#define _ASM_X86_TOPOLOGY_H
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#ifdef CONFIG_X86_32
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# ifdef CONFIG_X86_HT
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# define ENABLE_TOPO_DEFINES
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# endif
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#else
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# ifdef CONFIG_SMP
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# define ENABLE_TOPO_DEFINES
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# endif
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#endif
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/* Node not present */
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#define NUMA_NO_NODE (-1)
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#ifdef CONFIG_NUMA
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#include <linux/cpumask.h>
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#include <asm/mpspec.h>
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#ifdef CONFIG_X86_32
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/* Mappings between logical cpu number and node number */
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extern int cpu_to_node_map[];
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/* Returns the number of the node containing CPU 'cpu' */
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static inline int cpu_to_node(int cpu)
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{
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return cpu_to_node_map[cpu];
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}
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#define early_cpu_to_node(cpu) cpu_to_node(cpu)
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#else /* CONFIG_X86_64 */
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/* Mappings between logical cpu number and node number */
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DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
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/* Returns the number of the current Node. */
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DECLARE_PER_CPU(int, node_number);
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#define numa_node_id() percpu_read(node_number)
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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extern int cpu_to_node(int cpu);
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extern int early_cpu_to_node(int cpu);
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#else /* !CONFIG_DEBUG_PER_CPU_MAPS */
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/* Returns the number of the node containing CPU 'cpu' */
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static inline int cpu_to_node(int cpu)
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{
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return per_cpu(x86_cpu_to_node_map, cpu);
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}
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/* Same function but used if called before per_cpu areas are setup */
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static inline int early_cpu_to_node(int cpu)
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{
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return early_per_cpu(x86_cpu_to_node_map, cpu);
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}
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#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
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#endif /* CONFIG_X86_64 */
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/* Mappings between node number and cpus on that node. */
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extern cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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extern const struct cpumask *cpumask_of_node(int node);
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#else
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/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
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static inline const struct cpumask *cpumask_of_node(int node)
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{
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return node_to_cpumask_map[node];
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}
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#endif
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extern void setup_node_to_cpumask_map(void);
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/*
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* Returns the number of the node containing Node 'node'. This
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* architecture is flat, so it is a pretty simple function!
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*/
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#define parent_node(node) (node)
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#define pcibus_to_node(bus) __pcibus_to_node(bus)
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#ifdef CONFIG_X86_32
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extern unsigned long node_start_pfn[];
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extern unsigned long node_end_pfn[];
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extern unsigned long node_remap_size[];
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#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
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# define SD_CACHE_NICE_TRIES 1
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# define SD_IDLE_IDX 1
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# define SD_NEWIDLE_IDX 2
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# define SD_FORKEXEC_IDX 0
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#else
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# define SD_CACHE_NICE_TRIES 2
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# define SD_IDLE_IDX 2
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# define SD_NEWIDLE_IDX 2
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# define SD_FORKEXEC_IDX 1
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#endif
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/* sched_domains SD_NODE_INIT for NUMA machines */
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#define SD_NODE_INIT (struct sched_domain) { \
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.min_interval = 8, \
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.max_interval = 32, \
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.busy_factor = 32, \
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.imbalance_pct = 125, \
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.cache_nice_tries = SD_CACHE_NICE_TRIES, \
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.busy_idx = 3, \
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.idle_idx = SD_IDLE_IDX, \
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.newidle_idx = SD_NEWIDLE_IDX, \
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.wake_idx = 1, \
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.forkexec_idx = SD_FORKEXEC_IDX, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_EXEC \
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| SD_BALANCE_FORK \
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| SD_WAKE_AFFINE \
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| SD_WAKE_BALANCE \
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| SD_SERIALIZE, \
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.last_balance = jiffies, \
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.balance_interval = 1, \
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}
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#ifdef CONFIG_X86_64_ACPI_NUMA
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extern int __node_distance(int, int);
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#define node_distance(a, b) __node_distance(a, b)
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#endif
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#else /* !CONFIG_NUMA */
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static inline int numa_node_id(void)
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{
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return 0;
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}
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static inline int cpu_to_node(int cpu)
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{
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return 0;
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}
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static inline int early_cpu_to_node(int cpu)
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{
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return 0;
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}
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static inline const struct cpumask *cpumask_of_node(int node)
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{
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return cpu_online_mask;
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}
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static inline void setup_node_to_cpumask_map(void) { }
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#endif
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#include <asm-generic/topology.h>
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extern const struct cpumask *cpu_coregroup_mask(int cpu);
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#ifdef ENABLE_TOPO_DEFINES
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#define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id)
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#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
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#define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu))
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#define topology_thread_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu))
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/* indicates that pointers to the topology cpumask_t maps are valid */
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#define arch_provides_topology_pointers yes
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#endif
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static inline void arch_fix_phys_package_id(int num, u32 slot)
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{
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}
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struct pci_bus;
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void x86_pci_root_bus_res_quirks(struct pci_bus *b);
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#ifdef CONFIG_SMP
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#define mc_capable() ((boot_cpu_data.x86_max_cores > 1) && \
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(cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids))
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#define smt_capable() (smp_num_siblings > 1)
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#endif
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#ifdef CONFIG_NUMA
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extern int get_mp_bus_to_node(int busnum);
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extern void set_mp_bus_to_node(int busnum, int node);
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#else
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static inline int get_mp_bus_to_node(int busnum)
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{
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return 0;
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}
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static inline void set_mp_bus_to_node(int busnum, int node)
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{
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}
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#endif
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#endif /* _ASM_X86_TOPOLOGY_H */
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