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65b5b5e648
Add support for MCP78S chipset in nv_tco watchdog driver Signed-off-by: Aleksey Kunitskiy <alexey.kv@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
519 lines
12 KiB
C
519 lines
12 KiB
C
/*
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* nv_tco 0.01: TCO timer driver for NV chipsets
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*
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* (c) Copyright 2005 Google Inc., All Rights Reserved.
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*
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* Based off i8xx_tco.c:
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* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
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* Reserved.
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* http://www.kernelconcepts.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* TCO timer driver for NV chipsets
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* based on softdog.c by Alan Cox <alan@redhat.com>
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*/
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/*
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* Includes, defines, variables, module parameters, ...
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/jiffies.h>
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#include <linux/platform_device.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include "nv_tco.h"
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/* Module and version information */
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#define TCO_VERSION "0.01"
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#define TCO_MODULE_NAME "NV_TCO"
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#define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
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/* internal variables */
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static unsigned int tcobase;
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static DEFINE_SPINLOCK(tco_lock); /* Guards the hardware */
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static unsigned long timer_alive;
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static char tco_expect_close;
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static struct pci_dev *tco_pci;
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/* the watchdog platform device */
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static struct platform_device *nv_tco_platform_device;
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/* module parameters */
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#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (2<heartbeat<39) */
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static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, "
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"default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"
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" (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/*
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* Some TCO specific functions
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*/
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static inline unsigned char seconds_to_ticks(int seconds)
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{
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/* the internal timer is stored as ticks which decrement
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* every 0.6 seconds */
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return (seconds * 10) / 6;
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}
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static void tco_timer_start(void)
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{
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u32 val;
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unsigned long flags;
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spin_lock_irqsave(&tco_lock, flags);
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val = inl(TCO_CNT(tcobase));
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val &= ~TCO_CNT_TCOHALT;
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outl(val, TCO_CNT(tcobase));
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spin_unlock_irqrestore(&tco_lock, flags);
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}
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static void tco_timer_stop(void)
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{
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u32 val;
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unsigned long flags;
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spin_lock_irqsave(&tco_lock, flags);
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val = inl(TCO_CNT(tcobase));
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val |= TCO_CNT_TCOHALT;
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outl(val, TCO_CNT(tcobase));
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spin_unlock_irqrestore(&tco_lock, flags);
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}
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static void tco_timer_keepalive(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&tco_lock, flags);
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outb(0x01, TCO_RLD(tcobase));
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spin_unlock_irqrestore(&tco_lock, flags);
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}
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static int tco_timer_set_heartbeat(int t)
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{
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int ret = 0;
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unsigned char tmrval;
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unsigned long flags;
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u8 val;
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/*
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* note seconds_to_ticks(t) > t, so if t > 0x3f, so is
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* tmrval=seconds_to_ticks(t). Check that the count in seconds isn't
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* out of range on it's own (to avoid overflow in tmrval).
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*/
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if (t < 0 || t > 0x3f)
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return -EINVAL;
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tmrval = seconds_to_ticks(t);
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/* "Values of 0h-3h are ignored and should not be attempted" */
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if (tmrval > 0x3f || tmrval < 0x04)
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return -EINVAL;
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/* Write new heartbeat to watchdog */
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spin_lock_irqsave(&tco_lock, flags);
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val = inb(TCO_TMR(tcobase));
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val &= 0xc0;
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val |= tmrval;
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outb(val, TCO_TMR(tcobase));
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val = inb(TCO_TMR(tcobase));
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if ((val & 0x3f) != tmrval)
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ret = -EINVAL;
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spin_unlock_irqrestore(&tco_lock, flags);
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if (ret)
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return ret;
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heartbeat = t;
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return 0;
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}
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/*
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* /dev/watchdog handling
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*/
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static int nv_tco_open(struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &timer_alive))
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return -EBUSY;
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/* Reload and activate timer */
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tco_timer_keepalive();
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tco_timer_start();
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return nonseekable_open(inode, file);
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}
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static int nv_tco_release(struct inode *inode, struct file *file)
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{
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/* Shut off the timer */
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if (tco_expect_close == 42) {
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tco_timer_stop();
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} else {
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pr_crit("Unexpected close, not stopping watchdog!\n");
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tco_timer_keepalive();
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}
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clear_bit(0, &timer_alive);
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tco_expect_close = 0;
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return 0;
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}
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static ssize_t nv_tco_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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/* See if we got the magic character 'V' and reload the timer */
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if (len) {
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if (!nowayout) {
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size_t i;
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/*
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* note: just in case someone wrote the magic character
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* five months ago...
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*/
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tco_expect_close = 0;
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/*
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* scan to see whether or not we got the magic
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* character
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*/
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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tco_expect_close = 42;
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}
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}
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/* someone wrote to us, we should reload the timer */
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tco_timer_keepalive();
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}
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return len;
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}
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static long nv_tco_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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int new_options, retval = -EINVAL;
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int new_heartbeat;
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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static const struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.firmware_version = 0,
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.identity = TCO_MODULE_NAME,
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, p);
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case WDIOC_SETOPTIONS:
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if (get_user(new_options, p))
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return -EFAULT;
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if (new_options & WDIOS_DISABLECARD) {
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tco_timer_stop();
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retval = 0;
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}
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if (new_options & WDIOS_ENABLECARD) {
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tco_timer_keepalive();
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tco_timer_start();
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retval = 0;
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}
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return retval;
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case WDIOC_KEEPALIVE:
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tco_timer_keepalive();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_heartbeat, p))
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return -EFAULT;
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if (tco_timer_set_heartbeat(new_heartbeat))
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return -EINVAL;
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tco_timer_keepalive();
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/* Fall through */
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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default:
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return -ENOTTY;
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}
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}
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/*
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* Kernel Interfaces
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*/
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static const struct file_operations nv_tco_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = nv_tco_write,
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.unlocked_ioctl = nv_tco_ioctl,
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.open = nv_tco_open,
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.release = nv_tco_release,
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};
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static struct miscdevice nv_tco_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &nv_tco_fops,
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};
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/*
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* Data for PCI driver interface
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*
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* This data only exists for exporting the supported
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* PCI ids via MODULE_DEVICE_TABLE. We do not actually
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* register a pci_driver, because someone else might one day
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* want to register another driver on the same PCI id.
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*/
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static const struct pci_device_id tco_pci_tbl[] = {
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{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS,
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PCI_ANY_ID, PCI_ANY_ID, },
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{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS,
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PCI_ANY_ID, PCI_ANY_ID, },
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{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS,
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PCI_ANY_ID, PCI_ANY_ID, },
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{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS,
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PCI_ANY_ID, PCI_ANY_ID, },
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE(pci, tco_pci_tbl);
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/*
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* Init & exit routines
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*/
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static unsigned char nv_tco_getdevice(void)
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{
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struct pci_dev *dev = NULL;
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u32 val;
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/* Find the PCI device */
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for_each_pci_dev(dev) {
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if (pci_match_id(tco_pci_tbl, dev) != NULL) {
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tco_pci = dev;
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break;
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}
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}
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if (!tco_pci)
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return 0;
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/* Find the base io port */
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pci_read_config_dword(tco_pci, 0x64, &val);
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val &= 0xffff;
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if (val == 0x0001 || val == 0x0000) {
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/* Something is wrong here, bar isn't setup */
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pr_err("failed to get tcobase address\n");
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return 0;
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}
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val &= 0xff00;
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tcobase = val + 0x40;
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if (!request_region(tcobase, 0x10, "NV TCO")) {
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pr_err("I/O address 0x%04x already in use\n", tcobase);
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return 0;
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}
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/* Set a reasonable heartbeat before we stop the timer */
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tco_timer_set_heartbeat(30);
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/*
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* Stop the TCO before we change anything so we don't race with
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* a zeroed timer.
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*/
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tco_timer_keepalive();
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tco_timer_stop();
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/* Disable SMI caused by TCO */
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if (!request_region(MCP51_SMI_EN(tcobase), 4, "NV TCO")) {
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pr_err("I/O address 0x%04x already in use\n",
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MCP51_SMI_EN(tcobase));
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goto out;
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}
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val = inl(MCP51_SMI_EN(tcobase));
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val &= ~MCP51_SMI_EN_TCO;
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outl(val, MCP51_SMI_EN(tcobase));
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val = inl(MCP51_SMI_EN(tcobase));
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release_region(MCP51_SMI_EN(tcobase), 4);
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if (val & MCP51_SMI_EN_TCO) {
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pr_err("Could not disable SMI caused by TCO\n");
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goto out;
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}
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/* Check chipset's NO_REBOOT bit */
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pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
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val |= MCP51_SMBUS_SETUP_B_TCO_REBOOT;
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pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
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pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
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if (!(val & MCP51_SMBUS_SETUP_B_TCO_REBOOT)) {
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pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
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goto out;
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}
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return 1;
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out:
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release_region(tcobase, 0x10);
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return 0;
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}
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static int nv_tco_init(struct platform_device *dev)
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{
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int ret;
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/* Check whether or not the hardware watchdog is there */
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if (!nv_tco_getdevice())
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return -ENODEV;
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/* Check to see if last reboot was due to watchdog timeout */
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pr_info("Watchdog reboot %sdetected\n",
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inl(TCO_STS(tcobase)) & TCO_STS_TCO2TO_STS ? "" : "not ");
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/* Clear out the old status */
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outl(TCO_STS_RESET, TCO_STS(tcobase));
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/*
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* Check that the heartbeat value is within it's range.
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* If not, reset to the default.
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*/
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if (tco_timer_set_heartbeat(heartbeat)) {
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heartbeat = WATCHDOG_HEARTBEAT;
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tco_timer_set_heartbeat(heartbeat);
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pr_info("heartbeat value must be 2<heartbeat<39, using %d\n",
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heartbeat);
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}
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ret = misc_register(&nv_tco_miscdev);
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if (ret != 0) {
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pr_err("cannot register miscdev on minor=%d (err=%d)\n",
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WATCHDOG_MINOR, ret);
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goto unreg_region;
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}
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clear_bit(0, &timer_alive);
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tco_timer_stop();
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pr_info("initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n",
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tcobase, heartbeat, nowayout);
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return 0;
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unreg_region:
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release_region(tcobase, 0x10);
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return ret;
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}
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static void nv_tco_cleanup(void)
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{
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u32 val;
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/* Stop the timer before we leave */
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if (!nowayout)
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tco_timer_stop();
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/* Set the NO_REBOOT bit to prevent later reboots, just for sure */
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pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
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val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
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pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
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pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
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if (val & MCP51_SMBUS_SETUP_B_TCO_REBOOT) {
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pr_crit("Couldn't unset REBOOT bit. Machine may soon reset\n");
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}
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/* Deregister */
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misc_deregister(&nv_tco_miscdev);
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release_region(tcobase, 0x10);
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}
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static int nv_tco_remove(struct platform_device *dev)
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{
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if (tcobase)
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nv_tco_cleanup();
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return 0;
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}
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static void nv_tco_shutdown(struct platform_device *dev)
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{
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u32 val;
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tco_timer_stop();
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/* Some BIOSes fail the POST (once) if the NO_REBOOT flag is not
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* unset during shutdown. */
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pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
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val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
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pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
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}
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static struct platform_driver nv_tco_driver = {
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.probe = nv_tco_init,
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.remove = nv_tco_remove,
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.shutdown = nv_tco_shutdown,
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.driver = {
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.name = TCO_MODULE_NAME,
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},
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};
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static int __init nv_tco_init_module(void)
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{
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int err;
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pr_info("NV TCO WatchDog Timer Driver v%s\n", TCO_VERSION);
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err = platform_driver_register(&nv_tco_driver);
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if (err)
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return err;
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nv_tco_platform_device = platform_device_register_simple(
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TCO_MODULE_NAME, -1, NULL, 0);
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if (IS_ERR(nv_tco_platform_device)) {
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err = PTR_ERR(nv_tco_platform_device);
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goto unreg_platform_driver;
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}
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return 0;
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unreg_platform_driver:
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platform_driver_unregister(&nv_tco_driver);
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return err;
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}
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static void __exit nv_tco_cleanup_module(void)
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{
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platform_device_unregister(nv_tco_platform_device);
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platform_driver_unregister(&nv_tco_driver);
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pr_info("NV TCO Watchdog Module Unloaded\n");
|
|
}
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|
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module_init(nv_tco_init_module);
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module_exit(nv_tco_cleanup_module);
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|
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MODULE_AUTHOR("Mike Waychison");
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MODULE_DESCRIPTION("TCO timer driver for NV chipsets");
|
|
MODULE_LICENSE("GPL");
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