linux/drivers/clk/qcom
Linus Torvalds ca4e7c5120 The large diff this time around is from the addition of a new clk driver
for the TI Davinci family of SoCs. So far those clks have been supported
 with a custom implementation of the clk API in the arch port instead of in
 the CCF. With this driver merged we're one step closer to having a single
 clk API implementation.
 
 The other large diff is from the Amlogic clk driver that underwent some
 major surgery to use regmap. Beyond that, the biggest hitter is Samsung
 which needed some reworks to properly handle clk provider power domains
 and a bunch of PLL rate updates.
 
 The core framework was fairly quiet this round, just getting some cleanups
 and small fixes for some of the more esoteric features. And the usual
 set of driver non-critical fixes, cleanups, and minor additions are here as
 well.
 
 Core:
  - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops
  - debugfs ops macroized to shave some lines of boilerplate code
  - Always calculate the phase instead of caching it in clk_get_phase()
  - More __must_check on bulk clk APIs
 
 New Drivers:
  - TI's Davinci family of SoCs
  - Intel's Stratix10 SoC
  - stm32mp157 SoC
  - Allwinner H6 CCU
  - Silicon Labs SI544 clock generator chip
  - Renesas R-Car M3-N and V3H SoCs
  - i.MX6SLL SoCs
 
 Removed Drivers:
  - ST-Ericsson AB8540/9540
 
 Updates:
  - Mediatek MT2701 and MT7622 audsys support and MT2712 updates
  - STM32F469 DSI and STM32F769 sdmmc2 support
  - GPIO clks can sleep now
  - Spreadtrum SC9860 RTC clks
  - Nvidia Tegra MBIST workarounds and various minor fixes
  - Rockchip phase handling fixes and a memory leak plugged
  - Renesas drivers switch to readl/writel from clk_readl/clk_writel
  - Renesas gained CPU (Z/Z2) and watchdog support
  - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support
  - Qualcomm PM8921 PMIC XO buffers
  - Amlogic migrates to regmap APIs
  - TI Keystone clk latching support
  - Allwinner H3 and H5 video clk fixes
  - Broadcom BCM2835 PLLs needed another bit to enable
  - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix
  - i.MX6UL/ULL epdc_podf support
  - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlrPhMARHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSVkkxAArsItSoxQV18kQlJ9S7o2z75giquXQfvy
 Y/cKIIY1kz4K+qm+rpbl6PjukrSPtfM+wGmepGt+CptOdlj672viFxI7zjrd1iSy
 /xJo7d5/nZxvmx0qcwYWVTCOsU+4FUUkpq5mE91KEvwny/qgRqEgWeLoWTDLBktF
 MzGtBUYudjkRYLd2I31DGB3dqI0Dy9JwuEpJfCAt5h4dztml3aNjYknjQ/vUSEXL
 61mSYM1fwzK8rnrjSlQqb+X0OoJ6d5Pz2uHRXnWfGlS8UOh5N9NFGKpiErLm+h/+
 /FigA6f9HBeUneNf5Dnu568FHwE2FyUbZKVd40OYj3x128OnAoKUoRt68/8FQPdf
 NoQb3zH3Ha1JbwWgvQ9RkWp82kYnMctrlkh6IFye/FxdfwCWA4SE/iIgJXRJbQ/K
 blZz14jkXT8oISqy6nryGv3CK/RFXzVdvVa4z41xHc4cnLpNBsv1o89a+9MyTvMD
 wYOnc/98/l5xYs5PvQqNrd/onE0GLIeOEtkWNXH0OACe6FOIuz5eVn4Uh8aIm0wl
 +EHwHRwB7AQK+a7jwEfQ88aceAntvFlymUUcsncyCXn2s0knc5BHJPSHhoZk1tJb
 Wv2Fcln3Mwjhhq9aoNxfAJf4pIqmFgdQEtwyND4GJlP55Xay5QMZVEdwnNfFDvmf
 X6P2pfkBqkg=
 =ys4O
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The large diff this time around is from the addition of a new clk
  driver for the TI Davinci family of SoCs. So far those clks have been
  supported with a custom implementation of the clk API in the arch port
  instead of in the CCF. With this driver merged we're one step closer
  to having a single clk API implementation.

  The other large diff is from the Amlogic clk driver that underwent
  some major surgery to use regmap. Beyond that, the biggest hitter is
  Samsung which needed some reworks to properly handle clk provider
  power domains and a bunch of PLL rate updates.

  The core framework was fairly quiet this round, just getting some
  cleanups and small fixes for some of the more esoteric features. And
  the usual set of driver non-critical fixes, cleanups, and minor
  additions are here as well.

  Core:
   - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops
   - debugfs ops macroized to shave some lines of boilerplate code
   - Always calculate the phase instead of caching it in clk_get_phase()
   - More __must_check on bulk clk APIs

  New Drivers:
   - TI's Davinci family of SoCs
   - Intel's Stratix10 SoC
   - stm32mp157 SoC
   - Allwinner H6 CCU
   - Silicon Labs SI544 clock generator chip
   - Renesas R-Car M3-N and V3H SoCs
   - i.MX6SLL SoCs

  Removed Drivers:
   - ST-Ericsson AB8540/9540

  Updates:
   - Mediatek MT2701 and MT7622 audsys support and MT2712 updates
   - STM32F469 DSI and STM32F769 sdmmc2 support
   - GPIO clks can sleep now
   - Spreadtrum SC9860 RTC clks
   - Nvidia Tegra MBIST workarounds and various minor fixes
   - Rockchip phase handling fixes and a memory leak plugged
   - Renesas drivers switch to readl/writel from clk_readl/clk_writel
   - Renesas gained CPU (Z/Z2) and watchdog support
   - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support
   - Qualcomm PM8921 PMIC XO buffers
   - Amlogic migrates to regmap APIs
   - TI Keystone clk latching support
   - Allwinner H3 and H5 video clk fixes
   - Broadcom BCM2835 PLLs needed another bit to enable
   - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix
   - i.MX6UL/ULL epdc_podf support
   - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits)
  clk: davinci: add a reset lookup table for psc0
  clk: imx: add clock driver for imx6sll
  dt-bindings: imx: update clock doc for imx6sll
  clk: imx: add new gate/gate2 wrapper funtion
  clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
  clk: cs2000: set pm_ops in hibernate-compatible way
  clk: bcm2835: De-assert/assert PLL reset signal when appropriate
  clk: imx7d: Move clks_init_on before any clock operations
  clk: imx7d: Correct ahb clk parent select
  clk: imx7d: Correct dram pll type
  clk: imx7d: Add USB clock information
  clk: socfpga: stratix10: add clock driver for Stratix10 platform
  dt-bindings: documentation: add clock bindings information for Stratix10
  clk: ti: fix flag space conflict with clkctrl clocks
  clk: uniphier: add additional ethernet clock lines for Pro4
  clk: uniphier: add SATA clock control support
  clk: uniphier: add PCIe clock control support
  clk: Add driver for the si544 clock generator chip
  clk: davinci: Remove redundant dev_err calls
  clk: uniphier: add ethernet clock control support for PXs3
  ...
2018-04-13 15:51:06 -07:00
..
a53-pll.c clk: qcom: Add A53 PLL support 2018-01-02 10:00:24 -08:00
apcs-msm8916.c clk: qcom: msm8916: Fix return value check in qcom_apcs_msm8916_clk_probe() 2018-03-12 15:14:24 -07:00
clk-alpha-pll.c clk: qcom: add read-only alpha pll post divider operations 2017-12-13 16:54:10 -08:00
clk-alpha-pll.h clk: qcom: add read-only alpha pll post divider operations 2017-12-13 16:54:10 -08:00
clk-branch.c clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) 2015-08-24 16:49:12 -07:00
clk-branch.h clk: qcom: Add support for branches/gate clocks 2014-01-16 12:01:01 -08:00
clk-pll.c clk: qcom: Enable FSM mode for votable alpha PLLs 2016-11-01 18:39:17 -07:00
clk-pll.h clk: qcom: Add support for SR2 PLLs 2015-07-07 17:19:58 -07:00
clk-rcg2.c clk: qcom: Remove unused RCG ops 2017-11-01 23:43:42 -07:00
clk-rcg.c clk: qcom: Fix pre-divider usage for pixel RCG 2016-02-29 12:57:06 -08:00
clk-rcg.h clk: qcom: add parent map for regmap mux 2017-12-21 16:03:22 -08:00
clk-regmap-divider.c clk: qcom: use divider_ro_round_rate helper 2018-03-12 15:10:27 -07:00
clk-regmap-divider.h clk: qcom: add read-only divider operations 2017-12-21 16:03:19 -08:00
clk-regmap-mux-div.c clk: qcom: Add regmap mux-div clocks support 2018-01-02 10:00:24 -08:00
clk-regmap-mux-div.h clk: qcom: Add regmap mux-div clocks support 2018-01-02 10:00:24 -08:00
clk-regmap-mux.c clk: qcom: add parent map for regmap mux 2017-12-21 16:03:22 -08:00
clk-regmap-mux.h clk: qcom: add parent map for regmap mux 2017-12-21 16:03:22 -08:00
clk-regmap.c clk: qcom: Migrate to clk_hw based registration and OF APIs 2016-08-24 17:37:06 -07:00
clk-regmap.h clk: qcom: Migrate to clk_hw based registration and OF APIs 2016-08-24 17:37:06 -07:00
clk-rpm.c clk: qcom: rpmcc: Add support to XO buffered clocks 2018-03-19 14:40:26 -07:00
clk-smd-rpm.c clk: qcom: smd-rpm: Migrate to devm_of_clk_add_hw_provider() 2018-03-16 15:52:39 -07:00
clk-spmi-pmic-div.c clk: qcom: Add spmi_pmic clock divider support 2017-12-06 22:30:30 -08:00
common.c clk: qcom: common: fix legacy board-clock registration 2017-11-14 15:53:29 -08:00
common.h clk: qcom: add parent map for regmap mux 2017-12-21 16:03:22 -08:00
gcc-apq8084.c clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops 2016-11-23 11:00:06 -08:00
gcc-ipq806x.c clk: qcom: ipq806x: Fix board clk rates 2016-11-09 17:10:32 -08:00
gcc-ipq4019.c clk: qcom: ipq4019: Add the cpu clock frequency change notifier 2016-12-27 13:44:34 -08:00
gcc-ipq8074.c clk: qcom: ipq8074: add misc resets for PCIE and NSS 2017-12-21 16:03:40 -08:00
gcc-mdm9615.c clk: mdm9615: Add EBI2 clock 2017-01-09 16:33:26 -08:00
gcc-msm8660.c clk: qcom: add EBI2 clocks to the MSM8660 GCC 2016-07-01 18:12:45 -07:00
gcc-msm8916.c clk: qcom: msm8916: add 12.288 MHz support to codec dig clk 2017-12-06 22:34:09 -08:00
gcc-msm8960.c clk: qcom: Remove CLK_IS_ROOT 2016-03-04 12:53:53 -08:00
gcc-msm8974.c clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops 2016-11-23 11:00:06 -08:00
gcc-msm8994.c clk: qcom: support for alpha pll properties 2017-12-13 13:45:30 -08:00
gcc-msm8996.c clk: qcom: gcc-msm8996: Mark aggre0 noc clks as critical 2018-03-16 15:35:35 -07:00
gdsc.c clk: qcom: gdsc: Fix handling of hw control enable/disable 2017-01-26 16:00:38 -08:00
gdsc.h clk: qcom: gdsc: Add support for gdscs with HW control 2016-11-23 16:41:15 -08:00
Kconfig Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-next 2018-01-26 16:41:58 -08:00
lcc-ipq806x.c clk: qcom: lcc-ipq806x: Fixup overriding val in regmap_read call 2016-11-01 17:44:09 -07:00
lcc-mdm9615.c clk: mdm9615: Add support for MDM9615 Clock Controllers 2016-08-15 15:51:21 -07:00
lcc-msm8960.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
Makefile Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-next 2018-01-26 16:41:58 -08:00
mmcc-apq8084.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
mmcc-msm8960.c clk: qcom: Remove CLK_IS_ROOT 2016-03-04 12:53:53 -08:00
mmcc-msm8974.c Merge branch 'clk-fixes' into clk-next 2016-02-18 19:17:29 -08:00
mmcc-msm8996.c clk: qcom: support for alpha pll properties 2017-12-13 13:45:30 -08:00
reset.c clk: qcom: Make reset_control_ops const 2016-03-29 16:30:26 -07:00
reset.h clk: qcom: Make reset_control_ops const 2016-03-29 16:30:26 -07:00