linux/arch/riscv/lib
Christoph Hellwig 6bd33e1ece riscv: add nommu support
The kernel runs in M-mode without using page tables, and thus can't run
bare metal without help from additional firmware.

Most of the patch is just stubbing out code not needed without page
tables, but there is an interesting detail in the signals implementation:

 - The normal RISC-V syscall ABI only implements rt_sigreturn as VDSO
   entry point, but the ELF VDSO is not supported for nommu Linux.
   We instead copy the code to call the syscall onto the stack.

In addition to enabling the nommu code a new defconfig for a small
kernel image that can run in nommu mode on qemu is also provided, to run
a kernel in qemu you can use the following command line:

qemu-system-riscv64 -smp 2 -m 64 -machine virt -nographic \
	-kernel arch/riscv/boot/loader \
	-drive file=rootfs.ext2,format=raw,id=hd0 \
	-device virtio-blk-device,drive=hd0

Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com>.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
[paul.walmsley@sifive.com: updated to apply; add CONFIG_MMU guards
 around PCI_IOBASE definition to fix build issues; fixed checkpatch
 issues; move the PCI_IO_* and VMEMMAP address space macros along
 with the others; resolve sparse warning]
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-11-17 15:17:39 -08:00
..
delay.c riscv: delay: use do_div() instead of __udivdi3() 2019-08-08 16:05:38 -07:00
Makefile riscv: add nommu support 2019-11-17 15:17:39 -08:00
memcpy.S treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
memset.S treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
tishift.S treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
uaccess.S riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00