Bjorn Andersson 72f039db49 phy: qcom-qmp: Ensure register indirection arrays initialized ... It's possible that struct qmp_phy_cfg->regs references an array that is smaller than the possible register lookups that is going to be performed, with the resulting out-of-bounds read resulting in undefined behavior. One such example is when during qcom_qmp_phy_com_init() performs a qphy_setbits() on entry QPHY_PCS_POWER_DOWN_CONTROL (i.e. 17) with msm8996_ufsphy_regs_layout only being 12 entries long. Solve this by inflating all "regs_layout" arrays to ensure that any remaining entries are zero-initialized, as expected by the code. Fixes: e4d8b05ad5 ("phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200515013643.2081941-1-bjorn.andersson@linaro.org Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>		2020-05-18 19:30:56 +05:30
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Kconfig	phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs	2020-05-05 10:44:04 +05:30
Makefile	phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs	2020-05-05 10:44:04 +05:30
phy-ath79-usb.c	phy: ath79-usb: Fix the main reset name to match the DT binding	2019-01-16 18:00:57 +05:30
phy-qcom-apq8064-sata.c	phy: qualcomm: Adjust indentation in read_poll_timeout	2020-01-08 12:58:06 +05:30
phy-qcom-ipq806x-sata.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
phy-qcom-ipq4019-usb.c	phy: add driver for Qualcomm IPQ40xx USB PHY	2020-05-04 13:07:29 +05:30
phy-qcom-pcie2.c	phy: qcom: Add Qualcomm PCIe2 PHY driver	2019-05-31 19:41:13 +05:30
phy-qcom-qmp.c	phy: qcom-qmp: Ensure register indirection arrays initialized	2020-05-18 19:30:56 +05:30
phy-qcom-qmp.h	phy: qcom-qmp: Rename UFS PCS QMP v4 registers	2020-05-05 10:44:04 +05:30
phy-qcom-qusb2.c	phy: qcom-qusb2: Add new overriding tuning parameters in QUSB2 V2 PHY	2020-03-20 19:34:29 +05:30
phy-qcom-snps-femto-v2.c	phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs	2020-05-05 10:44:04 +05:30
phy-qcom-ufs-i.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
phy-qcom-ufs-qmp-14nm.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
phy-qcom-ufs-qmp-14nm.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
phy-qcom-ufs-qmp-20nm.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
phy-qcom-ufs-qmp-20nm.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
phy-qcom-ufs.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
phy-qcom-usb-hs-28nm.c	phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver	2020-03-20 19:34:29 +05:30
phy-qcom-usb-hs.c	phy: qcom-usb-hs: Fix extcon double register after power cycle	2019-10-31 16:54:01 +05:30
phy-qcom-usb-hsic.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
phy-qcom-usb-ss.c	phy: qualcomm: usb: Add SuperSpeed PHY driver	2020-03-20 19:34:29 +05:30