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a5564e7e44
Initialize hw device by calling the initialization functions of aeqs and management channel. Signed-off-by: Aviad Krawczyk <aviad.krawczyk@huawei.com> Signed-off-by: Zhao Chen <zhaochen6@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
350 lines
7.9 KiB
C
350 lines
7.9 KiB
C
/*
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* Huawei HiNIC PCI Express Linux driver
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include "hinic_hw_if.h"
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#include "hinic_hw_eqs.h"
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#include "hinic_hw_mgmt.h"
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#include "hinic_hw_dev.h"
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#define MAX_IRQS(max_qps, num_aeqs, num_ceqs) \
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(2 * (max_qps) + (num_aeqs) + (num_ceqs))
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enum intr_type {
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INTR_MSIX_TYPE,
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};
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/* HW struct */
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struct hinic_dev_cap {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u8 rsvd1[5];
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u8 intr_type;
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u8 rsvd2[66];
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u16 max_sqs;
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u16 max_rqs;
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u8 rsvd3[208];
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};
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/**
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* get_capability - convert device capabilities to NIC capabilities
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* @hwdev: the HW device to set and convert device capabilities for
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* @dev_cap: device capabilities from FW
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*
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* Return 0 - Success, negative - Failure
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**/
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static int get_capability(struct hinic_hwdev *hwdev,
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struct hinic_dev_cap *dev_cap)
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{
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struct hinic_cap *nic_cap = &hwdev->nic_cap;
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int num_aeqs, num_ceqs, num_irqs;
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if (!HINIC_IS_PF(hwdev->hwif) && !HINIC_IS_PPF(hwdev->hwif))
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return -EINVAL;
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if (dev_cap->intr_type != INTR_MSIX_TYPE)
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return -EFAULT;
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num_aeqs = HINIC_HWIF_NUM_AEQS(hwdev->hwif);
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num_ceqs = HINIC_HWIF_NUM_CEQS(hwdev->hwif);
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num_irqs = HINIC_HWIF_NUM_IRQS(hwdev->hwif);
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/* Each QP has its own (SQ + RQ) interrupts */
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nic_cap->num_qps = (num_irqs - (num_aeqs + num_ceqs)) / 2;
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/* num_qps must be power of 2 */
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nic_cap->num_qps = BIT(fls(nic_cap->num_qps) - 1);
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nic_cap->max_qps = dev_cap->max_sqs + 1;
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if (nic_cap->max_qps != (dev_cap->max_rqs + 1))
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return -EFAULT;
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if (nic_cap->num_qps > nic_cap->max_qps)
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nic_cap->num_qps = nic_cap->max_qps;
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return 0;
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}
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/**
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* get_cap_from_fw - get device capabilities from FW
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* @pfhwdev: the PF HW device to get capabilities for
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*
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* Return 0 - Success, negative - Failure
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**/
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static int get_cap_from_fw(struct hinic_pfhwdev *pfhwdev)
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{
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struct hinic_hwdev *hwdev = &pfhwdev->hwdev;
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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struct hinic_dev_cap dev_cap;
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u16 in_len, out_len;
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int err;
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in_len = 0;
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out_len = sizeof(dev_cap);
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err = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_CFGM,
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HINIC_CFG_NIC_CAP, &dev_cap, in_len, &dev_cap,
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&out_len, HINIC_MGMT_MSG_SYNC);
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if (err) {
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dev_err(&pdev->dev, "Failed to get capability from FW\n");
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return err;
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}
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return get_capability(hwdev, &dev_cap);
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}
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/**
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* get_dev_cap - get device capabilities
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* @hwdev: the NIC HW device to get capabilities for
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*
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* Return 0 - Success, negative - Failure
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**/
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static int get_dev_cap(struct hinic_hwdev *hwdev)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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struct hinic_pfhwdev *pfhwdev;
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int err;
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switch (HINIC_FUNC_TYPE(hwif)) {
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case HINIC_PPF:
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case HINIC_PF:
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pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);
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err = get_cap_from_fw(pfhwdev);
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if (err) {
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dev_err(&pdev->dev, "Failed to get capability from FW\n");
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return err;
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}
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break;
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default:
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dev_err(&pdev->dev, "Unsupported PCI Function type\n");
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return -EINVAL;
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}
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return 0;
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}
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/**
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* init_msix - enable the msix and save the entries
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* @hwdev: the NIC HW device
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*
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* Return 0 - Success, negative - Failure
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**/
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static int init_msix(struct hinic_hwdev *hwdev)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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int nr_irqs, num_aeqs, num_ceqs;
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size_t msix_entries_size;
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int i, err;
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num_aeqs = HINIC_HWIF_NUM_AEQS(hwif);
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num_ceqs = HINIC_HWIF_NUM_CEQS(hwif);
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nr_irqs = MAX_IRQS(HINIC_MAX_QPS, num_aeqs, num_ceqs);
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if (nr_irqs > HINIC_HWIF_NUM_IRQS(hwif))
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nr_irqs = HINIC_HWIF_NUM_IRQS(hwif);
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msix_entries_size = nr_irqs * sizeof(*hwdev->msix_entries);
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hwdev->msix_entries = devm_kzalloc(&pdev->dev, msix_entries_size,
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GFP_KERNEL);
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if (!hwdev->msix_entries)
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return -ENOMEM;
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for (i = 0; i < nr_irqs; i++)
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hwdev->msix_entries[i].entry = i;
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err = pci_enable_msix_exact(pdev, hwdev->msix_entries, nr_irqs);
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if (err) {
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dev_err(&pdev->dev, "Failed to enable pci msix\n");
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return err;
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}
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return 0;
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}
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/**
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* disable_msix - disable the msix
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* @hwdev: the NIC HW device
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**/
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static void disable_msix(struct hinic_hwdev *hwdev)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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pci_disable_msix(pdev);
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}
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/**
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* init_pfhwdev - Initialize the extended components of PF
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* @pfhwdev: the HW device for PF
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*
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* Return 0 - success, negative - failure
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**/
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static int init_pfhwdev(struct hinic_pfhwdev *pfhwdev)
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{
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struct hinic_hwdev *hwdev = &pfhwdev->hwdev;
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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int err;
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err = hinic_pf_to_mgmt_init(&pfhwdev->pf_to_mgmt, hwif);
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if (err) {
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dev_err(&pdev->dev, "Failed to initialize PF to MGMT channel\n");
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return err;
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}
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return 0;
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}
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/**
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* free_pfhwdev - Free the extended components of PF
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* @pfhwdev: the HW device for PF
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**/
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static void free_pfhwdev(struct hinic_pfhwdev *pfhwdev)
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{
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hinic_pf_to_mgmt_free(&pfhwdev->pf_to_mgmt);
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}
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/**
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* hinic_init_hwdev - Initialize the NIC HW
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* @pdev: the NIC pci device
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*
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* Return initialized NIC HW device
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*
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* Initialize the NIC HW device and return a pointer to it
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**/
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struct hinic_hwdev *hinic_init_hwdev(struct pci_dev *pdev)
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{
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struct hinic_pfhwdev *pfhwdev;
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struct hinic_hwdev *hwdev;
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struct hinic_hwif *hwif;
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int err, num_aeqs;
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hwif = devm_kzalloc(&pdev->dev, sizeof(*hwif), GFP_KERNEL);
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if (!hwif)
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return ERR_PTR(-ENOMEM);
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err = hinic_init_hwif(hwif, pdev);
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if (err) {
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dev_err(&pdev->dev, "Failed to init HW interface\n");
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return ERR_PTR(err);
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}
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if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {
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dev_err(&pdev->dev, "Unsupported PCI Function type\n");
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err = -EFAULT;
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goto err_func_type;
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}
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pfhwdev = devm_kzalloc(&pdev->dev, sizeof(*pfhwdev), GFP_KERNEL);
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if (!pfhwdev) {
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err = -ENOMEM;
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goto err_pfhwdev_alloc;
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}
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hwdev = &pfhwdev->hwdev;
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hwdev->hwif = hwif;
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err = init_msix(hwdev);
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if (err) {
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dev_err(&pdev->dev, "Failed to init msix\n");
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goto err_init_msix;
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}
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num_aeqs = HINIC_HWIF_NUM_AEQS(hwif);
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err = hinic_aeqs_init(&hwdev->aeqs, hwif, num_aeqs,
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HINIC_DEFAULT_AEQ_LEN, HINIC_EQ_PAGE_SIZE,
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hwdev->msix_entries);
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if (err) {
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dev_err(&pdev->dev, "Failed to init async event queues\n");
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goto err_aeqs_init;
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}
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err = init_pfhwdev(pfhwdev);
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if (err) {
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dev_err(&pdev->dev, "Failed to init PF HW device\n");
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goto err_init_pfhwdev;
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}
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err = get_dev_cap(hwdev);
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if (err) {
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dev_err(&pdev->dev, "Failed to get device capabilities\n");
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goto err_dev_cap;
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}
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return hwdev;
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err_dev_cap:
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free_pfhwdev(pfhwdev);
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err_init_pfhwdev:
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hinic_aeqs_free(&hwdev->aeqs);
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err_aeqs_init:
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disable_msix(hwdev);
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err_init_msix:
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err_pfhwdev_alloc:
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err_func_type:
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hinic_free_hwif(hwif);
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return ERR_PTR(err);
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}
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/**
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* hinic_free_hwdev - Free the NIC HW device
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* @hwdev: the NIC HW device
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**/
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void hinic_free_hwdev(struct hinic_hwdev *hwdev)
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{
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struct hinic_pfhwdev *pfhwdev = container_of(hwdev,
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struct hinic_pfhwdev,
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hwdev);
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free_pfhwdev(pfhwdev);
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hinic_aeqs_free(&hwdev->aeqs);
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disable_msix(hwdev);
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hinic_free_hwif(hwdev->hwif);
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}
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/**
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* hinic_hwdev_num_qps - return the number QPs available for use
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* @hwdev: the NIC HW device
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*
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* Return number QPs available for use
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**/
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int hinic_hwdev_num_qps(struct hinic_hwdev *hwdev)
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{
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struct hinic_cap *nic_cap = &hwdev->nic_cap;
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return nic_cap->num_qps;
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}
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