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02fbabd5f4
There maybe an overshoot, when disabling, then re-enabling vrefbuf
too quickly. VREFBUF is used by ADC/DAC on some boards. When re-enabling
too quickly, an overshoot on the reference voltage make the conversions
inaccurate for a short period of time.
- Don't put the VREFBUF in HiZ when disabling, to force an active
discharge.
- Enforce a 1ms OFF/ON delay
Fixes: 0cdbf481e9
("regulator: Add support for stm32-vrefbuf")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Message-Id: <1583312132-20932-1-git-send-email-fabrice.gasnier@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
308 lines
7.6 KiB
C
308 lines
7.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) STMicroelectronics 2017
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*
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* Author: Fabrice Gasnier <fabrice.gasnier@st.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/of_regulator.h>
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#include <linux/pm_runtime.h>
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/* STM32 VREFBUF registers */
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#define STM32_VREFBUF_CSR 0x00
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/* STM32 VREFBUF CSR bitfields */
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#define STM32_VRS GENMASK(6, 4)
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#define STM32_VRR BIT(3)
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#define STM32_HIZ BIT(1)
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#define STM32_ENVR BIT(0)
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#define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS 10
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struct stm32_vrefbuf {
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void __iomem *base;
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struct clk *clk;
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struct device *dev;
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};
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static const unsigned int stm32_vrefbuf_voltages[] = {
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/* Matches resp. VRS = 000b, 001b, 010b, 011b */
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2500000, 2048000, 1800000, 1500000,
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};
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static int stm32_vrefbuf_enable(struct regulator_dev *rdev)
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{
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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u32 val;
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int ret;
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ret = pm_runtime_get_sync(priv->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(priv->dev);
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return ret;
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}
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val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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val = (val & ~STM32_HIZ) | STM32_ENVR;
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writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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/*
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* Vrefbuf startup time depends on external capacitor: wait here for
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* VRR to be set. That means output has reached expected value.
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* ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
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* arbitrary timeout.
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*/
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ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
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val & STM32_VRR, 650, 10000);
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if (ret) {
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dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n");
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val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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val = (val & ~STM32_ENVR) | STM32_HIZ;
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writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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}
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pm_runtime_mark_last_busy(priv->dev);
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pm_runtime_put_autosuspend(priv->dev);
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return ret;
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}
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static int stm32_vrefbuf_disable(struct regulator_dev *rdev)
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{
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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u32 val;
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int ret;
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ret = pm_runtime_get_sync(priv->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(priv->dev);
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return ret;
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}
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val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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val &= ~STM32_ENVR;
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writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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pm_runtime_mark_last_busy(priv->dev);
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pm_runtime_put_autosuspend(priv->dev);
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return 0;
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}
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static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev)
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{
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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int ret;
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ret = pm_runtime_get_sync(priv->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(priv->dev);
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return ret;
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}
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ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
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pm_runtime_mark_last_busy(priv->dev);
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pm_runtime_put_autosuspend(priv->dev);
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return ret;
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}
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static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev,
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unsigned sel)
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{
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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u32 val;
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int ret;
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ret = pm_runtime_get_sync(priv->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(priv->dev);
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return ret;
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}
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val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel);
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writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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pm_runtime_mark_last_busy(priv->dev);
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pm_runtime_put_autosuspend(priv->dev);
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return 0;
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}
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static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev)
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{
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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u32 val;
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int ret;
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ret = pm_runtime_get_sync(priv->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(priv->dev);
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return ret;
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}
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val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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ret = FIELD_GET(STM32_VRS, val);
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pm_runtime_mark_last_busy(priv->dev);
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pm_runtime_put_autosuspend(priv->dev);
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return ret;
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}
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static const struct regulator_ops stm32_vrefbuf_volt_ops = {
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.enable = stm32_vrefbuf_enable,
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.disable = stm32_vrefbuf_disable,
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.is_enabled = stm32_vrefbuf_is_enabled,
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.get_voltage_sel = stm32_vrefbuf_get_voltage_sel,
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.set_voltage_sel = stm32_vrefbuf_set_voltage_sel,
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.list_voltage = regulator_list_voltage_table,
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};
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static const struct regulator_desc stm32_vrefbuf_regu = {
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.name = "vref",
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.supply_name = "vdda",
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.volt_table = stm32_vrefbuf_voltages,
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.n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages),
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.ops = &stm32_vrefbuf_volt_ops,
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.off_on_delay = 1000,
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.type = REGULATOR_VOLTAGE,
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.owner = THIS_MODULE,
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};
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static int stm32_vrefbuf_probe(struct platform_device *pdev)
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{
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struct stm32_vrefbuf *priv;
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struct regulator_config config = { };
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struct regulator_dev *rdev;
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int ret;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = &pdev->dev;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(priv->clk))
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return PTR_ERR(priv->clk);
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pm_runtime_get_noresume(&pdev->dev);
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_set_autosuspend_delay(&pdev->dev,
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STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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ret = clk_prepare_enable(priv->clk);
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if (ret) {
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dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret);
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goto err_pm_stop;
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}
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config.dev = &pdev->dev;
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config.driver_data = priv;
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config.of_node = pdev->dev.of_node;
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config.init_data = of_get_regulator_init_data(&pdev->dev,
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pdev->dev.of_node,
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&stm32_vrefbuf_regu);
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rdev = regulator_register(&stm32_vrefbuf_regu, &config);
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if (IS_ERR(rdev)) {
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ret = PTR_ERR(rdev);
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dev_err(&pdev->dev, "register failed with error %d\n", ret);
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goto err_clk_dis;
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}
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platform_set_drvdata(pdev, rdev);
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pm_runtime_mark_last_busy(&pdev->dev);
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pm_runtime_put_autosuspend(&pdev->dev);
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return 0;
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err_clk_dis:
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clk_disable_unprepare(priv->clk);
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err_pm_stop:
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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pm_runtime_put_noidle(&pdev->dev);
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return ret;
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}
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static int stm32_vrefbuf_remove(struct platform_device *pdev)
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{
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struct regulator_dev *rdev = platform_get_drvdata(pdev);
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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pm_runtime_get_sync(&pdev->dev);
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regulator_unregister(rdev);
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clk_disable_unprepare(priv->clk);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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pm_runtime_put_noidle(&pdev->dev);
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return 0;
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};
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static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev)
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{
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struct regulator_dev *rdev = dev_get_drvdata(dev);
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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clk_disable_unprepare(priv->clk);
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return 0;
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}
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static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev)
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{
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struct regulator_dev *rdev = dev_get_drvdata(dev);
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struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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return clk_prepare_enable(priv->clk);
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}
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static const struct dev_pm_ops stm32_vrefbuf_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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pm_runtime_force_resume)
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SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend,
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stm32_vrefbuf_runtime_resume,
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NULL)
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};
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static const struct of_device_id stm32_vrefbuf_of_match[] = {
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{ .compatible = "st,stm32-vrefbuf", },
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{},
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};
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MODULE_DEVICE_TABLE(of, stm32_vrefbuf_of_match);
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static struct platform_driver stm32_vrefbuf_driver = {
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.probe = stm32_vrefbuf_probe,
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.remove = stm32_vrefbuf_remove,
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.driver = {
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.name = "stm32-vrefbuf",
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.of_match_table = of_match_ptr(stm32_vrefbuf_of_match),
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.pm = &stm32_vrefbuf_pm_ops,
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},
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};
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module_platform_driver(stm32_vrefbuf_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
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MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver");
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MODULE_ALIAS("platform:stm32-vrefbuf");
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