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690677c22d
Move /reserved-memory node from RTD1295 to RTD129x DT. Convert RPC /memreserve/s into /reserved-memory nodes. Fixes:72a7786c0a("ARM64: dts: Add Realtek RTD1295 and Zidoo X9S") Fixes:f8b3436dad("arm64: dts: realtek: Factor out common RTD129x parts") Signed-off-by: Andreas Färber <afaerber@suse.de>
66 lines
1.2 KiB
Plaintext
66 lines
1.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
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/*
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* Realtek RTD1295 SoC
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*
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* Copyright (c) 2016-2019 Andreas Färber
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*/
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#include "rtd129x.dtsi"
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/ {
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compatible = "realtek,rtd1295";
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x0>;
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next-level-cache = <&l2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x1>;
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next-level-cache = <&l2>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x2>;
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next-level-cache = <&l2>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x3>;
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next-level-cache = <&l2>;
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};
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l2: l2-cache {
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compatible = "cache";
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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};
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&arm_pmu {
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interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
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};
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