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f170aa51e6
This renames TRBIDR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230614065949.146187-8-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
345 lines
10 KiB
C
345 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Debug and Guest Debug support
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*
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* Copyright (C) 2015 - Linaro Ltd
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* Author: Alex Bennée <alex.bennee@linaro.org>
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*/
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#include <linux/kvm_host.h>
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#include <linux/hw_breakpoint.h>
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#include <asm/debug-monitors.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_emulate.h>
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#include "trace.h"
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/* These are the bits of MDSCR_EL1 we may manipulate */
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#define MDSCR_EL1_DEBUG_MASK (DBG_MDSCR_SS | \
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DBG_MDSCR_KDE | \
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DBG_MDSCR_MDE)
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static DEFINE_PER_CPU(u64, mdcr_el2);
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/**
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* save/restore_guest_debug_regs
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*
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* For some debug operations we need to tweak some guest registers. As
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* a result we need to save the state of those registers before we
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* make those modifications.
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*
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* Guest access to MDSCR_EL1 is trapped by the hypervisor and handled
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* after we have restored the preserved value to the main context.
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*
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* When single-step is enabled by userspace, we tweak PSTATE.SS on every
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* guest entry. Preserve PSTATE.SS so we can restore the original value
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* for the vcpu after the single-step is disabled.
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*/
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static void save_guest_debug_regs(struct kvm_vcpu *vcpu)
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{
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u64 val = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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vcpu->arch.guest_debug_preserved.mdscr_el1 = val;
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trace_kvm_arm_set_dreg32("Saved MDSCR_EL1",
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vcpu->arch.guest_debug_preserved.mdscr_el1);
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vcpu->arch.guest_debug_preserved.pstate_ss =
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(*vcpu_cpsr(vcpu) & DBG_SPSR_SS);
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}
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static void restore_guest_debug_regs(struct kvm_vcpu *vcpu)
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{
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u64 val = vcpu->arch.guest_debug_preserved.mdscr_el1;
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vcpu_write_sys_reg(vcpu, val, MDSCR_EL1);
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trace_kvm_arm_set_dreg32("Restored MDSCR_EL1",
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vcpu_read_sys_reg(vcpu, MDSCR_EL1));
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if (vcpu->arch.guest_debug_preserved.pstate_ss)
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*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;
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else
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*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
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}
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/**
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* kvm_arm_init_debug - grab what we need for debug
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*
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* Currently the sole task of this function is to retrieve the initial
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* value of mdcr_el2 so we can preserve MDCR_EL2.HPMN which has
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* presumably been set-up by some knowledgeable bootcode.
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*
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* It is called once per-cpu during CPU hyp initialisation.
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*/
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void kvm_arm_init_debug(void)
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{
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__this_cpu_write(mdcr_el2, kvm_call_hyp_ret(__kvm_get_mdcr_el2));
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}
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/**
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* kvm_arm_setup_mdcr_el2 - configure vcpu mdcr_el2 value
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*
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* @vcpu: the vcpu pointer
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*
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* This ensures we will trap access to:
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* - Performance monitors (MDCR_EL2_TPM/MDCR_EL2_TPMCR)
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* - Debug ROM Address (MDCR_EL2_TDRA)
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* - OS related registers (MDCR_EL2_TDOSA)
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* - Statistical profiler (MDCR_EL2_TPMS/MDCR_EL2_E2PB)
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* - Self-hosted Trace Filter controls (MDCR_EL2_TTRF)
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* - Self-hosted Trace (MDCR_EL2_TTRF/MDCR_EL2_E2TB)
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*/
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static void kvm_arm_setup_mdcr_el2(struct kvm_vcpu *vcpu)
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{
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/*
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* This also clears MDCR_EL2_E2PB_MASK and MDCR_EL2_E2TB_MASK
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* to disable guest access to the profiling and trace buffers
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*/
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vcpu->arch.mdcr_el2 = __this_cpu_read(mdcr_el2) & MDCR_EL2_HPMN_MASK;
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vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM |
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MDCR_EL2_TPMS |
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MDCR_EL2_TTRF |
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MDCR_EL2_TPMCR |
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MDCR_EL2_TDRA |
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MDCR_EL2_TDOSA);
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/* Is the VM being debugged by userspace? */
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if (vcpu->guest_debug)
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/* Route all software debug exceptions to EL2 */
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vcpu->arch.mdcr_el2 |= MDCR_EL2_TDE;
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/*
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* Trap debug register access when one of the following is true:
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* - Userspace is using the hardware to debug the guest
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* (KVM_GUESTDBG_USE_HW is set).
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* - The guest is not using debug (DEBUG_DIRTY clear).
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* - The guest has enabled the OS Lock (debug exceptions are blocked).
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*/
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if ((vcpu->guest_debug & KVM_GUESTDBG_USE_HW) ||
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!vcpu_get_flag(vcpu, DEBUG_DIRTY) ||
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kvm_vcpu_os_lock_enabled(vcpu))
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vcpu->arch.mdcr_el2 |= MDCR_EL2_TDA;
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trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu->arch.mdcr_el2);
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}
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/**
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* kvm_arm_vcpu_init_debug - setup vcpu debug traps
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*
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* @vcpu: the vcpu pointer
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*
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* Set vcpu initial mdcr_el2 value.
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*/
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void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu)
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{
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preempt_disable();
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kvm_arm_setup_mdcr_el2(vcpu);
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preempt_enable();
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}
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/**
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* kvm_arm_reset_debug_ptr - reset the debug ptr to point to the vcpu state
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*/
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void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.debug_ptr = &vcpu->arch.vcpu_debug_state;
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}
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/**
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* kvm_arm_setup_debug - set up debug related stuff
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*
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* @vcpu: the vcpu pointer
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*
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* This is called before each entry into the hypervisor to setup any
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* debug related registers.
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*
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* Additionally, KVM only traps guest accesses to the debug registers if
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* the guest is not actively using them (see the DEBUG_DIRTY
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* flag on vcpu->arch.iflags). Since the guest must not interfere
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* with the hardware state when debugging the guest, we must ensure that
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* trapping is enabled whenever we are debugging the guest using the
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* debug registers.
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*/
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void kvm_arm_setup_debug(struct kvm_vcpu *vcpu)
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{
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unsigned long mdscr, orig_mdcr_el2 = vcpu->arch.mdcr_el2;
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trace_kvm_arm_setup_debug(vcpu, vcpu->guest_debug);
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kvm_arm_setup_mdcr_el2(vcpu);
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/* Check if we need to use the debug registers. */
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if (vcpu->guest_debug || kvm_vcpu_os_lock_enabled(vcpu)) {
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/* Save guest debug state */
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save_guest_debug_regs(vcpu);
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/*
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* Single Step (ARM ARM D2.12.3 The software step state
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* machine)
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*
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* If we are doing Single Step we need to manipulate
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* the guest's MDSCR_EL1.SS and PSTATE.SS. Once the
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* step has occurred the hypervisor will trap the
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* debug exception and we return to userspace.
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*
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* If the guest attempts to single step its userspace
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* we would have to deal with a trapped exception
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* while in the guest kernel. Because this would be
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* hard to unwind we suppress the guest's ability to
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* do so by masking MDSCR_EL.SS.
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*
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* This confuses guest debuggers which use
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* single-step behind the scenes but everything
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* returns to normal once the host is no longer
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* debugging the system.
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*/
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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/*
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* If the software step state at the last guest exit
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* was Active-pending, we don't set DBG_SPSR_SS so
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* that the state is maintained (to not run another
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* single-step until the pending Software Step
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* exception is taken).
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*/
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if (!vcpu_get_flag(vcpu, DBG_SS_ACTIVE_PENDING))
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*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;
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else
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*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr |= DBG_MDSCR_SS;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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} else {
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr &= ~DBG_MDSCR_SS;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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}
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trace_kvm_arm_set_dreg32("SPSR_EL2", *vcpu_cpsr(vcpu));
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/*
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* HW Breakpoints and watchpoints
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*
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* We simply switch the debug_ptr to point to our new
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* external_debug_state which has been populated by the
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* debug ioctl. The existing DEBUG_DIRTY mechanism ensures
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* the registers are updated on the world switch.
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*/
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if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
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/* Enable breakpoints/watchpoints */
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr |= DBG_MDSCR_MDE;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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vcpu->arch.debug_ptr = &vcpu->arch.external_debug_state;
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vcpu_set_flag(vcpu, DEBUG_DIRTY);
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trace_kvm_arm_set_regset("BKPTS", get_num_brps(),
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&vcpu->arch.debug_ptr->dbg_bcr[0],
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&vcpu->arch.debug_ptr->dbg_bvr[0]);
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trace_kvm_arm_set_regset("WAPTS", get_num_wrps(),
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&vcpu->arch.debug_ptr->dbg_wcr[0],
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&vcpu->arch.debug_ptr->dbg_wvr[0]);
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/*
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* The OS Lock blocks debug exceptions in all ELs when it is
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* enabled. If the guest has enabled the OS Lock, constrain its
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* effects to the guest. Emulate the behavior by clearing
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* MDSCR_EL1.MDE. In so doing, we ensure that host debug
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* exceptions are unaffected by guest configuration of the OS
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* Lock.
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*/
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} else if (kvm_vcpu_os_lock_enabled(vcpu)) {
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr &= ~DBG_MDSCR_MDE;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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}
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}
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BUG_ON(!vcpu->guest_debug &&
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vcpu->arch.debug_ptr != &vcpu->arch.vcpu_debug_state);
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/* If KDE or MDE are set, perform a full save/restore cycle. */
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if (vcpu_read_sys_reg(vcpu, MDSCR_EL1) & (DBG_MDSCR_KDE | DBG_MDSCR_MDE))
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vcpu_set_flag(vcpu, DEBUG_DIRTY);
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/* Write mdcr_el2 changes since vcpu_load on VHE systems */
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if (has_vhe() && orig_mdcr_el2 != vcpu->arch.mdcr_el2)
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write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2);
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trace_kvm_arm_set_dreg32("MDSCR_EL1", vcpu_read_sys_reg(vcpu, MDSCR_EL1));
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}
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void kvm_arm_clear_debug(struct kvm_vcpu *vcpu)
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{
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trace_kvm_arm_clear_debug(vcpu->guest_debug);
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/*
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* Restore the guest's debug registers if we were using them.
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*/
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if (vcpu->guest_debug || kvm_vcpu_os_lock_enabled(vcpu)) {
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS))
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/*
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* Mark the vcpu as ACTIVE_PENDING
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* until Software Step exception is taken.
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*/
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vcpu_set_flag(vcpu, DBG_SS_ACTIVE_PENDING);
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}
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restore_guest_debug_regs(vcpu);
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/*
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* If we were using HW debug we need to restore the
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* debug_ptr to the guest debug state.
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*/
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if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
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kvm_arm_reset_debug_ptr(vcpu);
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trace_kvm_arm_set_regset("BKPTS", get_num_brps(),
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&vcpu->arch.debug_ptr->dbg_bcr[0],
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&vcpu->arch.debug_ptr->dbg_bvr[0]);
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trace_kvm_arm_set_regset("WAPTS", get_num_wrps(),
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&vcpu->arch.debug_ptr->dbg_wcr[0],
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&vcpu->arch.debug_ptr->dbg_wvr[0]);
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}
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}
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}
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void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu)
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{
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u64 dfr0;
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/* For VHE, there is nothing to do */
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if (has_vhe())
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return;
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dfr0 = read_sysreg(id_aa64dfr0_el1);
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/*
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* If SPE is present on this CPU and is available at current EL,
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* we may need to check if the host state needs to be saved.
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*/
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if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_PMSVer_SHIFT) &&
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!(read_sysreg_s(SYS_PMBIDR_EL1) & BIT(PMBIDR_EL1_P_SHIFT)))
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vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_SPE);
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/* Check if we have TRBE implemented and available at the host */
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if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) &&
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!(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P))
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vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
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}
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void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu)
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{
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vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE);
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vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
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}
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