mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-17 09:14:19 +08:00
8233ab6aec
Some of the S5P platforms like S5PC100 and S5PV210 include SROM banks 4 and 5 in addition to SROM banks 0 to 3. This patch adds register offsets for SROM bank 4 and 5. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
55 lines
1.6 KiB
C
55 lines
1.6 KiB
C
/* linux/arch/arm/plat-s5p/include/plat/regs-srom.h
|
|
*
|
|
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
|
* http://www.samsung.com
|
|
*
|
|
* S5P SROMC register definitions
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#ifndef __ASM_PLAT_S5P_REGS_SROM_H
|
|
#define __ASM_PLAT_S5P_REGS_SROM_H __FILE__
|
|
|
|
#include <mach/map.h>
|
|
|
|
#define S5P_SROMREG(x) (S5P_VA_SROMC + (x))
|
|
|
|
#define S5P_SROM_BW S5P_SROMREG(0x0)
|
|
#define S5P_SROM_BC0 S5P_SROMREG(0x4)
|
|
#define S5P_SROM_BC1 S5P_SROMREG(0x8)
|
|
#define S5P_SROM_BC2 S5P_SROMREG(0xc)
|
|
#define S5P_SROM_BC3 S5P_SROMREG(0x10)
|
|
#define S5P_SROM_BC4 S5P_SROMREG(0x14)
|
|
#define S5P_SROM_BC5 S5P_SROMREG(0x18)
|
|
|
|
/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
|
|
|
|
#define S5P_SROM_BW__DATAWIDTH__SHIFT 0
|
|
#define S5P_SROM_BW__ADDRMODE__SHIFT 1
|
|
#define S5P_SROM_BW__WAITENABLE__SHIFT 2
|
|
#define S5P_SROM_BW__BYTEENABLE__SHIFT 3
|
|
|
|
#define S5P_SROM_BW__CS_MASK 0xf
|
|
|
|
#define S5P_SROM_BW__NCS0__SHIFT 0
|
|
#define S5P_SROM_BW__NCS1__SHIFT 4
|
|
#define S5P_SROM_BW__NCS2__SHIFT 8
|
|
#define S5P_SROM_BW__NCS3__SHIFT 12
|
|
#define S5P_SROM_BW__NCS4__SHIFT 16
|
|
#define S5P_SROM_BW__NCS5__SHIFT 20
|
|
|
|
/* applies to same to BCS0 - BCS3 */
|
|
|
|
#define S5P_SROM_BCX__PMC__SHIFT 0
|
|
#define S5P_SROM_BCX__TACP__SHIFT 4
|
|
#define S5P_SROM_BCX__TCAH__SHIFT 8
|
|
#define S5P_SROM_BCX__TCOH__SHIFT 12
|
|
#define S5P_SROM_BCX__TACC__SHIFT 16
|
|
#define S5P_SROM_BCX__TCOS__SHIFT 24
|
|
#define S5P_SROM_BCX__TACS__SHIFT 28
|
|
|
|
#endif /* __ASM_PLAT_S5P_REGS_SROM_H */
|