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On architectures for which access to GPU memory is non-coherent, caches need to be flushed and invalidated explicitly when BO control changes between CPU and GPU. This patch adds buffer synchronization functions which invokes the correct API (PCI or DMA) to ensure synchronization is effective. Based on the TTM DMA cache helper patches by Lucas Stach. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
110 lines
3.0 KiB
C
110 lines
3.0 KiB
C
#ifndef __NOUVEAU_BO_H__
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#define __NOUVEAU_BO_H__
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#include <drm/drm_gem.h>
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struct nouveau_channel;
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struct nouveau_fence;
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struct nouveau_vma;
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struct nouveau_bo {
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struct ttm_buffer_object bo;
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struct ttm_placement placement;
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u32 valid_domains;
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struct ttm_place placements[3];
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struct ttm_place busy_placements[3];
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bool force_coherent;
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struct ttm_bo_kmap_obj kmap;
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struct list_head head;
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/* protected by ttm_bo_reserve() */
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struct drm_file *reserved_by;
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struct list_head entry;
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int pbbo_index;
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bool validate_mapped;
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struct list_head vma_list;
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unsigned page_shift;
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u32 tile_mode;
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u32 tile_flags;
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struct nouveau_drm_tile *tile;
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/* Only valid if allocated via nouveau_gem_new() and iff you hold a
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* gem reference to it! For debugging, use gem.filp != NULL to test
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* whether it is valid. */
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struct drm_gem_object gem;
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/* protect by the ttm reservation lock */
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int pin_refcnt;
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struct ttm_bo_kmap_obj dma_buf_vmap;
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};
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static inline struct nouveau_bo *
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nouveau_bo(struct ttm_buffer_object *bo)
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{
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return container_of(bo, struct nouveau_bo, bo);
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}
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static inline int
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nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pnvbo)
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{
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struct nouveau_bo *prev;
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if (!pnvbo)
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return -EINVAL;
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prev = *pnvbo;
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*pnvbo = ref ? nouveau_bo(ttm_bo_reference(&ref->bo)) : NULL;
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if (prev) {
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struct ttm_buffer_object *bo = &prev->bo;
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ttm_bo_unref(&bo);
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}
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return 0;
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}
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extern struct ttm_bo_driver nouveau_bo_driver;
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void nouveau_bo_move_init(struct nouveau_drm *);
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int nouveau_bo_new(struct drm_device *, int size, int align, u32 flags,
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u32 tile_mode, u32 tile_flags, struct sg_table *sg,
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struct reservation_object *robj,
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struct nouveau_bo **);
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int nouveau_bo_pin(struct nouveau_bo *, u32 flags);
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int nouveau_bo_unpin(struct nouveau_bo *);
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int nouveau_bo_map(struct nouveau_bo *);
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void nouveau_bo_unmap(struct nouveau_bo *);
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void nouveau_bo_placement_set(struct nouveau_bo *, u32 type, u32 busy);
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u16 nouveau_bo_rd16(struct nouveau_bo *, unsigned index);
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void nouveau_bo_wr16(struct nouveau_bo *, unsigned index, u16 val);
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u32 nouveau_bo_rd32(struct nouveau_bo *, unsigned index);
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void nouveau_bo_wr32(struct nouveau_bo *, unsigned index, u32 val);
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void nouveau_bo_fence(struct nouveau_bo *, struct nouveau_fence *, bool exclusive);
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int nouveau_bo_validate(struct nouveau_bo *, bool interruptible,
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bool no_wait_gpu);
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void nouveau_bo_sync_for_device(struct nouveau_bo *nvbo);
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void nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo);
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struct nouveau_vma *
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nouveau_bo_vma_find(struct nouveau_bo *, struct nouveau_vm *);
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int nouveau_bo_vma_add(struct nouveau_bo *, struct nouveau_vm *,
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struct nouveau_vma *);
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void nouveau_bo_vma_del(struct nouveau_bo *, struct nouveau_vma *);
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/* TODO: submit equivalent to TTM generic API upstream? */
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static inline void __iomem *
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nvbo_kmap_obj_iovirtual(struct nouveau_bo *nvbo)
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{
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bool is_iomem;
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void __iomem *ioptr = (void __force __iomem *)ttm_kmap_obj_virtual(
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&nvbo->kmap, &is_iomem);
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WARN_ON_ONCE(ioptr && !is_iomem);
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return ioptr;
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}
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#endif
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