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334d37c9e2
Modify drivers to perform skcipher IV update using the crypto engine, instead of performing the operation in SW. Besides being more efficient, this also fixes IV update for CTR mode. Output HW S/G table is appended with an entry pointing to the same IV buffer used as input (which is now mapped BIDIRECTIONAL). AS (Algorithm State) parameter of the OPERATION command is changed from INIFINAL to INIT in descriptors used by ctr(aes), cbc(aes). This is needed since in case FINAL bit is set, HW skips IV updating in the Context Register for the last data block. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
117 lines
4.6 KiB
C
117 lines
4.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Shared descriptors for aead, skcipher algorithms
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*
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* Copyright 2016 NXP
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*/
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#ifndef _CAAMALG_DESC_H_
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#define _CAAMALG_DESC_H_
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/* length of descriptors text */
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#define DESC_AEAD_BASE (4 * CAAM_CMD_SZ)
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#define DESC_AEAD_ENC_LEN (DESC_AEAD_BASE + 11 * CAAM_CMD_SZ)
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#define DESC_AEAD_DEC_LEN (DESC_AEAD_BASE + 15 * CAAM_CMD_SZ)
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#define DESC_AEAD_GIVENC_LEN (DESC_AEAD_ENC_LEN + 7 * CAAM_CMD_SZ)
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#define DESC_QI_AEAD_ENC_LEN (DESC_AEAD_ENC_LEN + 3 * CAAM_CMD_SZ)
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#define DESC_QI_AEAD_DEC_LEN (DESC_AEAD_DEC_LEN + 3 * CAAM_CMD_SZ)
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#define DESC_QI_AEAD_GIVENC_LEN (DESC_AEAD_GIVENC_LEN + 3 * CAAM_CMD_SZ)
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/* Note: Nonce is counted in cdata.keylen */
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#define DESC_AEAD_CTR_RFC3686_LEN (4 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_BASE (3 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_ENC_LEN (DESC_AEAD_NULL_BASE + 11 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_DEC_LEN (DESC_AEAD_NULL_BASE + 13 * CAAM_CMD_SZ)
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#define DESC_GCM_BASE (3 * CAAM_CMD_SZ)
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#define DESC_GCM_ENC_LEN (DESC_GCM_BASE + 16 * CAAM_CMD_SZ)
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#define DESC_GCM_DEC_LEN (DESC_GCM_BASE + 12 * CAAM_CMD_SZ)
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#define DESC_QI_GCM_ENC_LEN (DESC_GCM_ENC_LEN + 6 * CAAM_CMD_SZ)
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#define DESC_QI_GCM_DEC_LEN (DESC_GCM_DEC_LEN + 3 * CAAM_CMD_SZ)
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#define DESC_RFC4106_BASE (3 * CAAM_CMD_SZ)
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#define DESC_RFC4106_ENC_LEN (DESC_RFC4106_BASE + 13 * CAAM_CMD_SZ)
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#define DESC_RFC4106_DEC_LEN (DESC_RFC4106_BASE + 13 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4106_ENC_LEN (DESC_RFC4106_ENC_LEN + 5 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4106_DEC_LEN (DESC_RFC4106_DEC_LEN + 5 * CAAM_CMD_SZ)
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#define DESC_RFC4543_BASE (3 * CAAM_CMD_SZ)
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#define DESC_RFC4543_ENC_LEN (DESC_RFC4543_BASE + 11 * CAAM_CMD_SZ)
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#define DESC_RFC4543_DEC_LEN (DESC_RFC4543_BASE + 12 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4543_ENC_LEN (DESC_RFC4543_ENC_LEN + 4 * CAAM_CMD_SZ)
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#define DESC_QI_RFC4543_DEC_LEN (DESC_RFC4543_DEC_LEN + 4 * CAAM_CMD_SZ)
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#define DESC_SKCIPHER_BASE (3 * CAAM_CMD_SZ)
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#define DESC_SKCIPHER_ENC_LEN (DESC_SKCIPHER_BASE + \
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21 * CAAM_CMD_SZ)
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#define DESC_SKCIPHER_DEC_LEN (DESC_SKCIPHER_BASE + \
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16 * CAAM_CMD_SZ)
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void cnstr_shdsc_aead_null_encap(u32 * const desc, struct alginfo *adata,
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unsigned int icvsize, int era);
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void cnstr_shdsc_aead_null_decap(u32 * const desc, struct alginfo *adata,
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unsigned int icvsize, int era);
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void cnstr_shdsc_aead_encap(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool is_rfc3686,
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u32 *nonce, const u32 ctx1_iv_off,
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const bool is_qi, int era);
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void cnstr_shdsc_aead_decap(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool geniv,
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const bool is_rfc3686, u32 *nonce,
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const u32 ctx1_iv_off, const bool is_qi, int era);
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void cnstr_shdsc_aead_givencap(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool is_rfc3686,
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u32 *nonce, const u32 ctx1_iv_off,
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const bool is_qi, int era);
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void cnstr_shdsc_gcm_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_gcm_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4106_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4106_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4543_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_rfc4543_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, unsigned int icvsize,
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const bool is_qi);
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void cnstr_shdsc_chachapoly(u32 * const desc, struct alginfo *cdata,
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struct alginfo *adata, unsigned int ivsize,
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unsigned int icvsize, const bool encap,
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const bool is_qi);
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void cnstr_shdsc_skcipher_encap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, const bool is_rfc3686,
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const u32 ctx1_iv_off);
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void cnstr_shdsc_skcipher_decap(u32 * const desc, struct alginfo *cdata,
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unsigned int ivsize, const bool is_rfc3686,
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const u32 ctx1_iv_off);
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void cnstr_shdsc_xts_skcipher_encap(u32 * const desc, struct alginfo *cdata);
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void cnstr_shdsc_xts_skcipher_decap(u32 * const desc, struct alginfo *cdata);
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#endif /* _CAAMALG_DESC_H_ */
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