mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-30 06:25:03 +08:00
b5f3294f0b
This driver has been tested on i.MX1/i.MX27/i.MX35 with an AT25 type EEPROM and on i.MX27/i.MX31 with a Freescale MC13783 PMIC. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: David Brownell <david-b@pacbell.net> Cc: Andrea Paterniani <a.paterniani@swapp-eng.it> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
28 lines
1.1 KiB
C
28 lines
1.1 KiB
C
|
|
#ifndef __MACH_SPI_H_
|
|
#define __MACH_SPI_H_
|
|
|
|
/*
|
|
* struct spi_imx_master - device.platform_data for SPI controller devices.
|
|
* @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio
|
|
* pins, numbers < 0 mean internal CSPI chipselects according
|
|
* to MXC_SPI_CS(). Normally you want to use gpio based chip
|
|
* selects as the CSPI module tries to be intelligent about
|
|
* when to assert the chipselect: The CSPI module deasserts the
|
|
* chipselect once it runs out of input data. The other problem
|
|
* is that it is not possible to mix between high active and low
|
|
* active chipselects on one single bus using the internal
|
|
* chipselects. Unfortunately Freescale decided to put some
|
|
* chipselects on dedicated pins which are not usable as gpios,
|
|
* so we have to support the internal chipselects.
|
|
* @num_chipselect: ARRAY_SIZE(chipselect)
|
|
*/
|
|
struct spi_imx_master {
|
|
int *chipselect;
|
|
int num_chipselect;
|
|
};
|
|
|
|
#define MXC_SPI_CS(no) ((no) - 32)
|
|
|
|
#endif /* __MACH_SPI_H_*/
|