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Add architecture specific implementation details for KFENCE and enable KFENCE for the riscv64 architecture. In particular, this implements the required interface in <asm/kfence.h>. KFENCE requires that attributes for pages from its memory pool can individually be set. Therefore, force the kfence pool to be mapped at page granularity. Testing this patch using the testcases in kfence_test.c and all passed. Signed-off-by: Liu Shixin <liushixin2@huawei.com> Acked-by: Marco Elver <elver@google.com> Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
64 lines
1.3 KiB
C
64 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_RISCV_KFENCE_H
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#define _ASM_RISCV_KFENCE_H
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#include <linux/kfence.h>
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#include <linux/pfn.h>
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#include <asm-generic/pgalloc.h>
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#include <asm/pgtable.h>
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static inline int split_pmd_page(unsigned long addr)
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{
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int i;
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unsigned long pfn = PFN_DOWN(__pa((addr & PMD_MASK)));
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pmd_t *pmd = pmd_off_k(addr);
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pte_t *pte = pte_alloc_one_kernel(&init_mm);
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if (!pte)
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return -ENOMEM;
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for (i = 0; i < PTRS_PER_PTE; i++)
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set_pte(pte + i, pfn_pte(pfn + i, PAGE_KERNEL));
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set_pmd(pmd, pfn_pmd(PFN_DOWN(__pa(pte)), PAGE_TABLE));
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flush_tlb_kernel_range(addr, addr + PMD_SIZE);
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return 0;
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}
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static inline bool arch_kfence_init_pool(void)
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{
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int ret;
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unsigned long addr;
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pmd_t *pmd;
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for (addr = (unsigned long)__kfence_pool; is_kfence_address((void *)addr);
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addr += PAGE_SIZE) {
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pmd = pmd_off_k(addr);
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if (pmd_leaf(*pmd)) {
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ret = split_pmd_page(addr);
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if (ret)
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return false;
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}
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}
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return true;
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}
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static inline bool kfence_protect_page(unsigned long addr, bool protect)
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{
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pte_t *pte = virt_to_kpte(addr);
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if (protect)
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set_pte(pte, __pte(pte_val(*pte) & ~_PAGE_PRESENT));
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else
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set_pte(pte, __pte(pte_val(*pte) | _PAGE_PRESENT));
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flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
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return true;
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}
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#endif /* _ASM_RISCV_KFENCE_H */
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