linux/arch/powerpc/perf
Benjamin Herrenschmidt 1ce447b90f powerpc/perf: Fix instruction address sampling on 970 and Power4
970 and Power4 don't support "continuous sampling" which means that
when we aren't in marked instruction sampling mode (marked events),
SIAR isn't updated with the last instruction sampled before the
perf interrupt. On those processors, we must thus use the exception
SRR0 value as the sampled instruction pointer.

Those processors also don't support the SIPR and SIHV bits in MMCRA
which means we need some kind of heuristic to decide if SIAR values
represent kernel or user addresses.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-03-28 11:33:24 +11:00
..
callchain.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
core-book3s.c powerpc/perf: Fix instruction address sampling on 970 and Power4 2012-03-28 11:33:24 +11:00
core-fsl-emb.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
e500-pmu.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
Makefile powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
mpc7450-pmu.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
power4-pmu.c powerpc/perf: Fix instruction address sampling on 970 and Power4 2012-03-28 11:33:24 +11:00
power5-pmu.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
power5+-pmu.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
power6-pmu.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
power7-pmu.c powerpc/perf: Move perf core & PMU code into a subdirectory 2012-02-23 10:50:04 +11:00
ppc970-pmu.c powerpc/perf: Fix instruction address sampling on 970 and Power4 2012-03-28 11:33:24 +11:00