Arnd Bergmann 6721cf8585 RISC-V DeviceTrees for v6.2 ... dt-bindings: - new compatibles to support the StarFive VisionFive & thead CPU cores - a fix for the PolarFire SoC's pwm binding, merged through my tree as suggested by the PWM maintainers Microchip: - Non-urgent fix for the node address not matches the reg in a way that the checkers don't complain about - Add GPIO controlled LEDs for Icicle - Support for the "CCC" clocks in the FPGA fabric. Previously these used fixed-frequency clocks in the dt, but if which CCC is in use is known, as in the v2022.09 Icicle Kit Reference Design, the rates can be read dynamically. It's an "is known" as it *can* be set via constraints in the FPGA tooling but does not have to be. - A fix for the Icicle's pwm-cells - Removal of some unused PCI clocks StarFive: - Addition of the VisionFive DT, which has been a long time coming! Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY3tLkQAKCRB4tDGHoIJi 0qM+AP9i7GnanM9SfzeRaftL/JO2RrDcM0QGW9tkE0DVsVyzugD+OxkxV4LJS9GJ O4UBM7APtCNJ7hUvvCQpikdAT2POKAI= =37HZ -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.2-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V DeviceTrees for v6.2 dt-bindings: - new compatibles to support the StarFive VisionFive & thead CPU cores - a fix for the PolarFire SoC's pwm binding, merged through my tree as suggested by the PWM maintainers Microchip: - Non-urgent fix for the node address not matches the reg in a way that the checkers don't complain about - Add GPIO controlled LEDs for Icicle - Support for the "CCC" clocks in the FPGA fabric. Previously these used fixed-frequency clocks in the dt, but if which CCC is in use is known, as in the v2022.09 Icicle Kit Reference Design, the rates can be read dynamically. It's an "is known" as it *can* be set via constraints in the FPGA tooling but does not have to be. - A fix for the Icicle's pwm-cells - Removal of some unused PCI clocks StarFive: - Addition of the VisionFive DT, which has been a long time coming! Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.2-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles riscv: dts: microchip: remove unused pcie clocks riscv: dts: microchip: remove pcie node from the sev kit riscv: dts: microchip: fix the icicle's #pwm-cells dt-bindings: pwm: fix microchip corePWM's pwm-cells riscv: dts: starfive: Add StarFive VisionFive V1 device tree riscv: dts: starfive: Add common DT for JH7100 based boards dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board riscv: dts: microchip: fix memory node unit address for icicle riscv: dts: microchip: icicle: Add GPIO controlled LEDs riscv: dts: microchip: add the mpfs' fabric clock control Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2022-11-22 22:57:53 +01:00
..
boot	RISC-V DeviceTrees for v6.2	2022-11-22 22:57:53 +01:00
configs	riscv: enable CD-ROM file systems in defconfig	2022-08-25 17:01:09 -07:00
errata	Merge patch series "Some style cleanups for recent extension additions"	2022-10-13 08:46:31 -07:00
include	RISC-V: KVM: Fix kvm_riscv_vcpu_timer_pending() for Sstc	2022-10-21 11:52:45 +05:30
kernel	RISC-V Patches for the 6.1 Merge Window, Part 2	2022-10-14 11:21:11 -07:00
kvm	RISC-V: KVM: Fix kvm_riscv_vcpu_timer_pending() for Sstc	2022-10-21 11:52:45 +05:30
lib	riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit	2022-08-10 14:06:31 -07:00
mm	RISC-V: Fix compilation without RISCV_ISA_ZICBOM	2022-10-21 11:52:39 +05:30
net	bpf, riscv: Support riscv jit to provide bpf_line_info	2022-06-02 16:26:01 -07:00
purgatory	riscv/purgatory: Omit use of bin2c	2022-08-11 09:32:34 -07:00
Kbuild	riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild	2022-06-01 22:26:32 -07:00
Kconfig	RISC-V Patches for the 6.1 Merge Window, Part 2	2022-10-14 11:21:11 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: make t-head erratas depend on MMU	2022-09-17 01:48:22 -07:00
Kconfig.socs	riscv: Kconfig: Style cleanups	2022-06-30 19:26:16 -07:00
Makefile	RISC-V Patches for the 6.1 Merge Window, Part 2	2022-10-14 11:21:11 -07:00