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baab853229
Add userspace support for the Memory Tagging Extension introduced by Armv8.5. (Catalin Marinas and others) * for-next/mte: (30 commits) arm64: mte: Fix typo in memory tagging ABI documentation arm64: mte: Add Memory Tagging Extension documentation arm64: mte: Kconfig entry arm64: mte: Save tags when hibernating arm64: mte: Enable swap of tagged pages mm: Add arch hooks for saving/restoring tags fs: Handle intra-page faults in copy_mount_options() arm64: mte: ptrace: Add NT_ARM_TAGGED_ADDR_CTRL regset arm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support arm64: mte: Allow {set,get}_tagged_addr_ctrl() on non-current tasks arm64: mte: Restore the GCR_EL1 register after a suspend arm64: mte: Allow user control of the generated random tags via prctl() arm64: mte: Allow user control of the tag check mode via prctl() mm: Allow arm64 mmap(PROT_MTE) on RAM-based files arm64: mte: Validate the PROT_MTE request via arch_validate_flags() mm: Introduce arch_validate_flags() arm64: mte: Add PROT_MTE support to mmap() and mprotect() mm: Introduce arch_calc_vm_flag_bits() arm64: mte: Tags-aware aware memcmp_pages() implementation arm64: Avoid unnecessary clear_user_page() indirection ...
725 lines
18 KiB
C
725 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*:
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* Hibernate support specific for ARM64
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*
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* Derived from work on ARM hibernation support by:
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*
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* Ubuntu project, hibernation support for mach-dove
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* Copyright (C) 2010 Nokia Corporation (Hiroshi Doyu)
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* Copyright (C) 2010 Texas Instruments, Inc. (Teerth Reddy et al.)
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* https://lkml.org/lkml/2010/6/18/4
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* https://lists.linux-foundation.org/pipermail/linux-pm/2010-June/027422.html
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* https://patchwork.kernel.org/patch/96442/
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*
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* Copyright (C) 2006 Rafael J. Wysocki <rjw@sisk.pl>
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*/
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#define pr_fmt(x) "hibernate: " x
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#include <linux/cpu.h>
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#include <linux/kvm_host.h>
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#include <linux/mm.h>
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#include <linux/pm.h>
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#include <linux/sched.h>
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#include <linux/suspend.h>
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#include <linux/utsname.h>
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#include <asm/barrier.h>
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#include <asm/cacheflush.h>
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#include <asm/cputype.h>
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#include <asm/daifflags.h>
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#include <asm/irqflags.h>
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#include <asm/kexec.h>
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#include <asm/memory.h>
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#include <asm/mmu_context.h>
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#include <asm/mte.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/sections.h>
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#include <asm/smp.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/sysreg.h>
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#include <asm/virt.h>
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/*
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* Hibernate core relies on this value being 0 on resume, and marks it
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* __nosavedata assuming it will keep the resume kernel's '0' value. This
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* doesn't happen with either KASLR.
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*
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* defined as "__visible int in_suspend __nosavedata" in
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* kernel/power/hibernate.c
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*/
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extern int in_suspend;
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/* Do we need to reset el2? */
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#define el2_reset_needed() (is_hyp_mode_available() && !is_kernel_in_hyp_mode())
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/* temporary el2 vectors in the __hibernate_exit_text section. */
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extern char hibernate_el2_vectors[];
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/* hyp-stub vectors, used to restore el2 during resume from hibernate. */
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extern char __hyp_stub_vectors[];
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/*
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* The logical cpu number we should resume on, initialised to a non-cpu
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* number.
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*/
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static int sleep_cpu = -EINVAL;
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/*
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* Values that may not change over hibernate/resume. We put the build number
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* and date in here so that we guarantee not to resume with a different
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* kernel.
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*/
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struct arch_hibernate_hdr_invariants {
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char uts_version[__NEW_UTS_LEN + 1];
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};
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/* These values need to be know across a hibernate/restore. */
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static struct arch_hibernate_hdr {
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struct arch_hibernate_hdr_invariants invariants;
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/* These are needed to find the relocated kernel if built with kaslr */
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phys_addr_t ttbr1_el1;
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void (*reenter_kernel)(void);
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/*
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* We need to know where the __hyp_stub_vectors are after restore to
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* re-configure el2.
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*/
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phys_addr_t __hyp_stub_vectors;
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u64 sleep_cpu_mpidr;
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} resume_hdr;
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static inline void arch_hdr_invariants(struct arch_hibernate_hdr_invariants *i)
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{
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memset(i, 0, sizeof(*i));
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memcpy(i->uts_version, init_utsname()->version, sizeof(i->uts_version));
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}
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int pfn_is_nosave(unsigned long pfn)
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{
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unsigned long nosave_begin_pfn = sym_to_pfn(&__nosave_begin);
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unsigned long nosave_end_pfn = sym_to_pfn(&__nosave_end - 1);
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return ((pfn >= nosave_begin_pfn) && (pfn <= nosave_end_pfn)) ||
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crash_is_nosave(pfn);
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}
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void notrace save_processor_state(void)
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{
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WARN_ON(num_online_cpus() != 1);
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}
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void notrace restore_processor_state(void)
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{
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}
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int arch_hibernation_header_save(void *addr, unsigned int max_size)
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{
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struct arch_hibernate_hdr *hdr = addr;
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if (max_size < sizeof(*hdr))
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return -EOVERFLOW;
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arch_hdr_invariants(&hdr->invariants);
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hdr->ttbr1_el1 = __pa_symbol(swapper_pg_dir);
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hdr->reenter_kernel = _cpu_resume;
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/* We can't use __hyp_get_vectors() because kvm may still be loaded */
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if (el2_reset_needed())
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hdr->__hyp_stub_vectors = __pa_symbol(__hyp_stub_vectors);
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else
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hdr->__hyp_stub_vectors = 0;
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/* Save the mpidr of the cpu we called cpu_suspend() on... */
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if (sleep_cpu < 0) {
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pr_err("Failing to hibernate on an unknown CPU.\n");
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return -ENODEV;
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}
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hdr->sleep_cpu_mpidr = cpu_logical_map(sleep_cpu);
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pr_info("Hibernating on CPU %d [mpidr:0x%llx]\n", sleep_cpu,
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hdr->sleep_cpu_mpidr);
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return 0;
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}
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EXPORT_SYMBOL(arch_hibernation_header_save);
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int arch_hibernation_header_restore(void *addr)
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{
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int ret;
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struct arch_hibernate_hdr_invariants invariants;
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struct arch_hibernate_hdr *hdr = addr;
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arch_hdr_invariants(&invariants);
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if (memcmp(&hdr->invariants, &invariants, sizeof(invariants))) {
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pr_crit("Hibernate image not generated by this kernel!\n");
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return -EINVAL;
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}
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sleep_cpu = get_logical_index(hdr->sleep_cpu_mpidr);
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pr_info("Hibernated on CPU %d [mpidr:0x%llx]\n", sleep_cpu,
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hdr->sleep_cpu_mpidr);
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if (sleep_cpu < 0) {
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pr_crit("Hibernated on a CPU not known to this kernel!\n");
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sleep_cpu = -EINVAL;
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return -EINVAL;
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}
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ret = bringup_hibernate_cpu(sleep_cpu);
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if (ret) {
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sleep_cpu = -EINVAL;
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return ret;
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}
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resume_hdr = *hdr;
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return 0;
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}
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EXPORT_SYMBOL(arch_hibernation_header_restore);
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static int trans_pgd_map_page(pgd_t *trans_pgd, void *page,
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unsigned long dst_addr,
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pgprot_t pgprot)
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{
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pgd_t *pgdp;
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p4d_t *p4dp;
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pud_t *pudp;
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pmd_t *pmdp;
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pte_t *ptep;
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pgdp = pgd_offset_pgd(trans_pgd, dst_addr);
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if (pgd_none(READ_ONCE(*pgdp))) {
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pudp = (void *)get_safe_page(GFP_ATOMIC);
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if (!pudp)
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return -ENOMEM;
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pgd_populate(&init_mm, pgdp, pudp);
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}
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p4dp = p4d_offset(pgdp, dst_addr);
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if (p4d_none(READ_ONCE(*p4dp))) {
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pudp = (void *)get_safe_page(GFP_ATOMIC);
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if (!pudp)
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return -ENOMEM;
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p4d_populate(&init_mm, p4dp, pudp);
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}
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pudp = pud_offset(p4dp, dst_addr);
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if (pud_none(READ_ONCE(*pudp))) {
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pmdp = (void *)get_safe_page(GFP_ATOMIC);
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if (!pmdp)
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return -ENOMEM;
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pud_populate(&init_mm, pudp, pmdp);
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}
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pmdp = pmd_offset(pudp, dst_addr);
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if (pmd_none(READ_ONCE(*pmdp))) {
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ptep = (void *)get_safe_page(GFP_ATOMIC);
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if (!ptep)
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return -ENOMEM;
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pmd_populate_kernel(&init_mm, pmdp, ptep);
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}
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ptep = pte_offset_kernel(pmdp, dst_addr);
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set_pte(ptep, pfn_pte(virt_to_pfn(page), PAGE_KERNEL_EXEC));
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return 0;
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}
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/*
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* Copies length bytes, starting at src_start into an new page,
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* perform cache maintenance, then maps it at the specified address low
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* address as executable.
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*
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* This is used by hibernate to copy the code it needs to execute when
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* overwriting the kernel text. This function generates a new set of page
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* tables, which it loads into ttbr0.
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*
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* Length is provided as we probably only want 4K of data, even on a 64K
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* page system.
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*/
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static int create_safe_exec_page(void *src_start, size_t length,
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unsigned long dst_addr,
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phys_addr_t *phys_dst_addr)
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{
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void *page = (void *)get_safe_page(GFP_ATOMIC);
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pgd_t *trans_pgd;
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int rc;
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if (!page)
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return -ENOMEM;
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memcpy(page, src_start, length);
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__flush_icache_range((unsigned long)page, (unsigned long)page + length);
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trans_pgd = (void *)get_safe_page(GFP_ATOMIC);
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if (!trans_pgd)
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return -ENOMEM;
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rc = trans_pgd_map_page(trans_pgd, page, dst_addr,
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PAGE_KERNEL_EXEC);
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if (rc)
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return rc;
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/*
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* Load our new page tables. A strict BBM approach requires that we
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* ensure that TLBs are free of any entries that may overlap with the
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* global mappings we are about to install.
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*
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* For a real hibernate/resume cycle TTBR0 currently points to a zero
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* page, but TLBs may contain stale ASID-tagged entries (e.g. for EFI
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* runtime services), while for a userspace-driven test_resume cycle it
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* points to userspace page tables (and we must point it at a zero page
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* ourselves). Elsewhere we only (un)install the idmap with preemption
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* disabled, so T0SZ should be as required regardless.
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*/
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cpu_set_reserved_ttbr0();
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local_flush_tlb_all();
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write_sysreg(phys_to_ttbr(virt_to_phys(trans_pgd)), ttbr0_el1);
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isb();
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*phys_dst_addr = virt_to_phys(page);
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return 0;
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}
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#define dcache_clean_range(start, end) __flush_dcache_area(start, (end - start))
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#ifdef CONFIG_ARM64_MTE
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static DEFINE_XARRAY(mte_pages);
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static int save_tags(struct page *page, unsigned long pfn)
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{
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void *tag_storage, *ret;
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tag_storage = mte_allocate_tag_storage();
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if (!tag_storage)
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return -ENOMEM;
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mte_save_page_tags(page_address(page), tag_storage);
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ret = xa_store(&mte_pages, pfn, tag_storage, GFP_KERNEL);
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if (WARN(xa_is_err(ret), "Failed to store MTE tags")) {
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mte_free_tag_storage(tag_storage);
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return xa_err(ret);
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} else if (WARN(ret, "swsusp: %s: Duplicate entry", __func__)) {
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mte_free_tag_storage(ret);
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}
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return 0;
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}
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static void swsusp_mte_free_storage(void)
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{
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XA_STATE(xa_state, &mte_pages, 0);
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void *tags;
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xa_lock(&mte_pages);
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xas_for_each(&xa_state, tags, ULONG_MAX) {
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mte_free_tag_storage(tags);
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}
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xa_unlock(&mte_pages);
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xa_destroy(&mte_pages);
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}
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static int swsusp_mte_save_tags(void)
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{
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struct zone *zone;
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unsigned long pfn, max_zone_pfn;
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int ret = 0;
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int n = 0;
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if (!system_supports_mte())
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return 0;
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for_each_populated_zone(zone) {
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max_zone_pfn = zone_end_pfn(zone);
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for (pfn = zone->zone_start_pfn; pfn < max_zone_pfn; pfn++) {
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struct page *page = pfn_to_online_page(pfn);
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if (!page)
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continue;
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if (!test_bit(PG_mte_tagged, &page->flags))
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continue;
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ret = save_tags(page, pfn);
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if (ret) {
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swsusp_mte_free_storage();
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goto out;
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}
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n++;
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}
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}
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pr_info("Saved %d MTE pages\n", n);
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out:
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return ret;
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}
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static void swsusp_mte_restore_tags(void)
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{
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XA_STATE(xa_state, &mte_pages, 0);
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int n = 0;
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void *tags;
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xa_lock(&mte_pages);
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xas_for_each(&xa_state, tags, ULONG_MAX) {
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unsigned long pfn = xa_state.xa_index;
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struct page *page = pfn_to_online_page(pfn);
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mte_restore_page_tags(page_address(page), tags);
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mte_free_tag_storage(tags);
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n++;
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}
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xa_unlock(&mte_pages);
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pr_info("Restored %d MTE pages\n", n);
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xa_destroy(&mte_pages);
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}
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#else /* CONFIG_ARM64_MTE */
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static int swsusp_mte_save_tags(void)
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{
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return 0;
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}
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static void swsusp_mte_restore_tags(void)
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{
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}
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#endif /* CONFIG_ARM64_MTE */
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int swsusp_arch_suspend(void)
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{
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int ret = 0;
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unsigned long flags;
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struct sleep_stack_data state;
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if (cpus_are_stuck_in_kernel()) {
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pr_err("Can't hibernate: no mechanism to offline secondary CPUs.\n");
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return -EBUSY;
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}
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flags = local_daif_save();
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if (__cpu_suspend_enter(&state)) {
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/* make the crash dump kernel image visible/saveable */
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crash_prepare_suspend();
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ret = swsusp_mte_save_tags();
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if (ret)
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return ret;
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sleep_cpu = smp_processor_id();
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ret = swsusp_save();
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} else {
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/* Clean kernel core startup/idle code to PoC*/
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dcache_clean_range(__mmuoff_data_start, __mmuoff_data_end);
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dcache_clean_range(__idmap_text_start, __idmap_text_end);
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/* Clean kvm setup code to PoC? */
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if (el2_reset_needed()) {
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dcache_clean_range(__hyp_idmap_text_start, __hyp_idmap_text_end);
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dcache_clean_range(__hyp_text_start, __hyp_text_end);
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}
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swsusp_mte_restore_tags();
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/* make the crash dump kernel image protected again */
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crash_post_resume();
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/*
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* Tell the hibernation core that we've just restored
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* the memory
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*/
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in_suspend = 0;
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sleep_cpu = -EINVAL;
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__cpu_suspend_exit();
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/*
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* Just in case the boot kernel did turn the SSBD
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* mitigation off behind our back, let's set the state
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* to what we expect it to be.
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*/
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spectre_v4_enable_mitigation(NULL);
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}
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local_daif_restore(flags);
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return ret;
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}
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static void _copy_pte(pte_t *dst_ptep, pte_t *src_ptep, unsigned long addr)
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{
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pte_t pte = READ_ONCE(*src_ptep);
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if (pte_valid(pte)) {
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/*
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* Resume will overwrite areas that may be marked
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* read only (code, rodata). Clear the RDONLY bit from
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* the temporary mappings we use during restore.
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*/
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set_pte(dst_ptep, pte_mkwrite(pte));
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} else if (debug_pagealloc_enabled() && !pte_none(pte)) {
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/*
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* debug_pagealloc will removed the PTE_VALID bit if
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* the page isn't in use by the resume kernel. It may have
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* been in use by the original kernel, in which case we need
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* to put it back in our copy to do the restore.
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*
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* Before marking this entry valid, check the pfn should
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* be mapped.
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*/
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BUG_ON(!pfn_valid(pte_pfn(pte)));
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set_pte(dst_ptep, pte_mkpresent(pte_mkwrite(pte)));
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}
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}
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static int copy_pte(pmd_t *dst_pmdp, pmd_t *src_pmdp, unsigned long start,
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unsigned long end)
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{
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pte_t *src_ptep;
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pte_t *dst_ptep;
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unsigned long addr = start;
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|
|
dst_ptep = (pte_t *)get_safe_page(GFP_ATOMIC);
|
|
if (!dst_ptep)
|
|
return -ENOMEM;
|
|
pmd_populate_kernel(&init_mm, dst_pmdp, dst_ptep);
|
|
dst_ptep = pte_offset_kernel(dst_pmdp, start);
|
|
|
|
src_ptep = pte_offset_kernel(src_pmdp, start);
|
|
do {
|
|
_copy_pte(dst_ptep, src_ptep, addr);
|
|
} while (dst_ptep++, src_ptep++, addr += PAGE_SIZE, addr != end);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int copy_pmd(pud_t *dst_pudp, pud_t *src_pudp, unsigned long start,
|
|
unsigned long end)
|
|
{
|
|
pmd_t *src_pmdp;
|
|
pmd_t *dst_pmdp;
|
|
unsigned long next;
|
|
unsigned long addr = start;
|
|
|
|
if (pud_none(READ_ONCE(*dst_pudp))) {
|
|
dst_pmdp = (pmd_t *)get_safe_page(GFP_ATOMIC);
|
|
if (!dst_pmdp)
|
|
return -ENOMEM;
|
|
pud_populate(&init_mm, dst_pudp, dst_pmdp);
|
|
}
|
|
dst_pmdp = pmd_offset(dst_pudp, start);
|
|
|
|
src_pmdp = pmd_offset(src_pudp, start);
|
|
do {
|
|
pmd_t pmd = READ_ONCE(*src_pmdp);
|
|
|
|
next = pmd_addr_end(addr, end);
|
|
if (pmd_none(pmd))
|
|
continue;
|
|
if (pmd_table(pmd)) {
|
|
if (copy_pte(dst_pmdp, src_pmdp, addr, next))
|
|
return -ENOMEM;
|
|
} else {
|
|
set_pmd(dst_pmdp,
|
|
__pmd(pmd_val(pmd) & ~PMD_SECT_RDONLY));
|
|
}
|
|
} while (dst_pmdp++, src_pmdp++, addr = next, addr != end);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int copy_pud(p4d_t *dst_p4dp, p4d_t *src_p4dp, unsigned long start,
|
|
unsigned long end)
|
|
{
|
|
pud_t *dst_pudp;
|
|
pud_t *src_pudp;
|
|
unsigned long next;
|
|
unsigned long addr = start;
|
|
|
|
if (p4d_none(READ_ONCE(*dst_p4dp))) {
|
|
dst_pudp = (pud_t *)get_safe_page(GFP_ATOMIC);
|
|
if (!dst_pudp)
|
|
return -ENOMEM;
|
|
p4d_populate(&init_mm, dst_p4dp, dst_pudp);
|
|
}
|
|
dst_pudp = pud_offset(dst_p4dp, start);
|
|
|
|
src_pudp = pud_offset(src_p4dp, start);
|
|
do {
|
|
pud_t pud = READ_ONCE(*src_pudp);
|
|
|
|
next = pud_addr_end(addr, end);
|
|
if (pud_none(pud))
|
|
continue;
|
|
if (pud_table(pud)) {
|
|
if (copy_pmd(dst_pudp, src_pudp, addr, next))
|
|
return -ENOMEM;
|
|
} else {
|
|
set_pud(dst_pudp,
|
|
__pud(pud_val(pud) & ~PUD_SECT_RDONLY));
|
|
}
|
|
} while (dst_pudp++, src_pudp++, addr = next, addr != end);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int copy_p4d(pgd_t *dst_pgdp, pgd_t *src_pgdp, unsigned long start,
|
|
unsigned long end)
|
|
{
|
|
p4d_t *dst_p4dp;
|
|
p4d_t *src_p4dp;
|
|
unsigned long next;
|
|
unsigned long addr = start;
|
|
|
|
dst_p4dp = p4d_offset(dst_pgdp, start);
|
|
src_p4dp = p4d_offset(src_pgdp, start);
|
|
do {
|
|
next = p4d_addr_end(addr, end);
|
|
if (p4d_none(READ_ONCE(*src_p4dp)))
|
|
continue;
|
|
if (copy_pud(dst_p4dp, src_p4dp, addr, next))
|
|
return -ENOMEM;
|
|
} while (dst_p4dp++, src_p4dp++, addr = next, addr != end);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int copy_page_tables(pgd_t *dst_pgdp, unsigned long start,
|
|
unsigned long end)
|
|
{
|
|
unsigned long next;
|
|
unsigned long addr = start;
|
|
pgd_t *src_pgdp = pgd_offset_k(start);
|
|
|
|
dst_pgdp = pgd_offset_pgd(dst_pgdp, start);
|
|
do {
|
|
next = pgd_addr_end(addr, end);
|
|
if (pgd_none(READ_ONCE(*src_pgdp)))
|
|
continue;
|
|
if (copy_p4d(dst_pgdp, src_pgdp, addr, next))
|
|
return -ENOMEM;
|
|
} while (dst_pgdp++, src_pgdp++, addr = next, addr != end);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int trans_pgd_create_copy(pgd_t **dst_pgdp, unsigned long start,
|
|
unsigned long end)
|
|
{
|
|
int rc;
|
|
pgd_t *trans_pgd = (pgd_t *)get_safe_page(GFP_ATOMIC);
|
|
|
|
if (!trans_pgd) {
|
|
pr_err("Failed to allocate memory for temporary page tables.\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
rc = copy_page_tables(trans_pgd, start, end);
|
|
if (!rc)
|
|
*dst_pgdp = trans_pgd;
|
|
|
|
return rc;
|
|
}
|
|
|
|
/*
|
|
* Setup then Resume from the hibernate image using swsusp_arch_suspend_exit().
|
|
*
|
|
* Memory allocated by get_safe_page() will be dealt with by the hibernate code,
|
|
* we don't need to free it here.
|
|
*/
|
|
int swsusp_arch_resume(void)
|
|
{
|
|
int rc;
|
|
void *zero_page;
|
|
size_t exit_size;
|
|
pgd_t *tmp_pg_dir;
|
|
phys_addr_t phys_hibernate_exit;
|
|
void __noreturn (*hibernate_exit)(phys_addr_t, phys_addr_t, void *,
|
|
void *, phys_addr_t, phys_addr_t);
|
|
|
|
/*
|
|
* Restoring the memory image will overwrite the ttbr1 page tables.
|
|
* Create a second copy of just the linear map, and use this when
|
|
* restoring.
|
|
*/
|
|
rc = trans_pgd_create_copy(&tmp_pg_dir, PAGE_OFFSET, PAGE_END);
|
|
if (rc)
|
|
return rc;
|
|
|
|
/*
|
|
* We need a zero page that is zero before & after resume in order to
|
|
* to break before make on the ttbr1 page tables.
|
|
*/
|
|
zero_page = (void *)get_safe_page(GFP_ATOMIC);
|
|
if (!zero_page) {
|
|
pr_err("Failed to allocate zero page.\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/*
|
|
* Locate the exit code in the bottom-but-one page, so that *NULL
|
|
* still has disastrous affects.
|
|
*/
|
|
hibernate_exit = (void *)PAGE_SIZE;
|
|
exit_size = __hibernate_exit_text_end - __hibernate_exit_text_start;
|
|
/*
|
|
* Copy swsusp_arch_suspend_exit() to a safe page. This will generate
|
|
* a new set of ttbr0 page tables and load them.
|
|
*/
|
|
rc = create_safe_exec_page(__hibernate_exit_text_start, exit_size,
|
|
(unsigned long)hibernate_exit,
|
|
&phys_hibernate_exit);
|
|
if (rc) {
|
|
pr_err("Failed to create safe executable page for hibernate_exit code.\n");
|
|
return rc;
|
|
}
|
|
|
|
/*
|
|
* The hibernate exit text contains a set of el2 vectors, that will
|
|
* be executed at el2 with the mmu off in order to reload hyp-stub.
|
|
*/
|
|
__flush_dcache_area(hibernate_exit, exit_size);
|
|
|
|
/*
|
|
* KASLR will cause the el2 vectors to be in a different location in
|
|
* the resumed kernel. Load hibernate's temporary copy into el2.
|
|
*
|
|
* We can skip this step if we booted at EL1, or are running with VHE.
|
|
*/
|
|
if (el2_reset_needed()) {
|
|
phys_addr_t el2_vectors = phys_hibernate_exit; /* base */
|
|
el2_vectors += hibernate_el2_vectors -
|
|
__hibernate_exit_text_start; /* offset */
|
|
|
|
__hyp_set_vectors(el2_vectors);
|
|
}
|
|
|
|
hibernate_exit(virt_to_phys(tmp_pg_dir), resume_hdr.ttbr1_el1,
|
|
resume_hdr.reenter_kernel, restore_pblist,
|
|
resume_hdr.__hyp_stub_vectors, virt_to_phys(zero_page));
|
|
|
|
return 0;
|
|
}
|
|
|
|
int hibernate_resume_nonboot_cpu_disable(void)
|
|
{
|
|
if (sleep_cpu < 0) {
|
|
pr_err("Failing to resume from hibernate on an unknown CPU.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
return freeze_secondary_cpus(sleep_cpu);
|
|
}
|