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66bb0aa077
they had small conflicts (respectively within KVM documentation, and with 3.16-rc changes). Since they were all within the subsystem, I took care of them. Stephen Rothwell reported some snags in PPC builds, but they are all fixed now; the latest linux-next report was clean. New features for ARM include: - KVM VGIC v2 emulation on GICv3 hardware - Big-Endian support for arm/arm64 (guest and host) - Debug Architecture support for arm64 (arm32 is on Christoffer's todo list) And for PPC: - Book3S: Good number of LE host fixes, enable HV on LE - Book3S HV: Add in-guest debug support This release drops support for KVM on the PPC440. As a result, the PPC merge removes more lines than it adds. :) I also included an x86 change, since Davidlohr tied it to an independent bug report and the reporter quickly provided a Tested-by; there was no reason to wait for -rc2. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJT4iIJAAoJEBvWZb6bTYbyZqoP/3Wxy8NWPFJ8HGt81NHlGnDS a9UbL7EibcOEG+aaKqmtBglTD5YDiGBDNCxxiSJaDHt+grLN4fsWIliJob1nJFoO 90f89EWN2XjeCrJXA5nUoeg5tpc5OoYKsiP6pTgzIwkP8vvs/H1+zpcTS/UmYsr/ qipVMMsM+zZeHWZcSbqjW88z7YqIn1sr5282wJ85cbyv4KGizb/G4dyPuDqLb6np hkAD8Ah6VV2suQ2FSy7G2fg20R0vglUi60hkEHLoCBPVqJCl7SmC8MvxNbjBnP8S J36R0R0u1wHYKzAGooLJGVOZ/o/gSiVqKX+++L2EvJBN+kuA6u/7fxLyBT+LwDAE IF/Aln5rpg1fe+eywvhz86WljTVEQ8bO1zVsIQUPY+/ZOPedZHMwyvXft8ogbjSp 2m9OJ/3e8Aggh0OeHpCDoeow+QDUXvX0YdCw+2Yh0p+7VMXqkyp0QEiBu38jrusC rB3VNifJbDSWLKdG9LfCAPHnxZD2XYEwv2WFBo6KQOGMGHfx0GXpCOL/jQihrhA6 HtEG5Bs3lvnHQemdpUZ58xojiABbMaUPdcnPXQQEp23WhZzrfLMLzqVG0VYnhSsC 9pi7MJj8c31rqx5WU2oRM28i/BvNxN0NCtkDpineO5s3f89Ws1xnwxqlm38AKP0J irJQTYFEqec+GM9JK1rG =hyQP -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull second round of KVM changes from Paolo Bonzini: "Here are the PPC and ARM changes for KVM, which I separated because they had small conflicts (respectively within KVM documentation, and with 3.16-rc changes). Since they were all within the subsystem, I took care of them. Stephen Rothwell reported some snags in PPC builds, but they are all fixed now; the latest linux-next report was clean. New features for ARM include: - KVM VGIC v2 emulation on GICv3 hardware - Big-Endian support for arm/arm64 (guest and host) - Debug Architecture support for arm64 (arm32 is on Christoffer's todo list) And for PPC: - Book3S: Good number of LE host fixes, enable HV on LE - Book3S HV: Add in-guest debug support This release drops support for KVM on the PPC440. As a result, the PPC merge removes more lines than it adds. :) I also included an x86 change, since Davidlohr tied it to an independent bug report and the reporter quickly provided a Tested-by; there was no reason to wait for -rc2" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (122 commits) KVM: Move more code under CONFIG_HAVE_KVM_IRQFD KVM: nVMX: fix "acknowledge interrupt on exit" when APICv is in use KVM: nVMX: Fix nested vmexit ack intr before load vmcs01 KVM: PPC: Enable IRQFD support for the XICS interrupt controller KVM: Give IRQFD its own separate enabling Kconfig option KVM: Move irq notifier implementation into eventfd.c KVM: Move all accesses to kvm::irq_routing into irqchip.c KVM: irqchip: Provide and use accessors for irq routing table KVM: Don't keep reference to irq routing table in irqfd struct KVM: PPC: drop duplicate tracepoint arm64: KVM: fix 64bit CP15 VM access for 32bit guests KVM: arm64: GICv3: mandate page-aligned GICV region arm64: KVM: GICv3: move system register access to msr_s/mrs_s KVM: PPC: PR: Handle FSCR feature deselects KVM: PPC: HV: Remove generic instruction emulation KVM: PPC: BOOKEHV: rename e500hv_spr to bookehv_spr KVM: PPC: Remove DCR handling KVM: PPC: Expose helper functions for data/inst faults KVM: PPC: Separate loadstore emulation from priv emulation KVM: PPC: Handle magic page in kvmppc_ld/st ...
337 lines
7.8 KiB
C
337 lines
7.8 KiB
C
/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/kvm_host.h>
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <asm/cputype.h>
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#include <asm/uaccess.h>
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#include <asm/kvm.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_coproc.h>
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#define VM_STAT(x) { #x, offsetof(struct kvm, stat.x), KVM_STAT_VM }
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#define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU }
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ NULL }
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};
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int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hcr = HCR_GUEST_MASK;
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return 0;
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}
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static u64 core_reg_offset_from_id(u64 id)
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{
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return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE);
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}
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static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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u32 __user *uaddr = (u32 __user *)(long)reg->addr;
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struct kvm_regs *regs = &vcpu->arch.regs;
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u64 off;
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if (KVM_REG_SIZE(reg->id) != 4)
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return -ENOENT;
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/* Our ID is an index into the kvm_regs struct. */
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off = core_reg_offset_from_id(reg->id);
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if (off >= sizeof(*regs) / KVM_REG_SIZE(reg->id))
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return -ENOENT;
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return put_user(((u32 *)regs)[off], uaddr);
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}
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static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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u32 __user *uaddr = (u32 __user *)(long)reg->addr;
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struct kvm_regs *regs = &vcpu->arch.regs;
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u64 off, val;
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if (KVM_REG_SIZE(reg->id) != 4)
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return -ENOENT;
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/* Our ID is an index into the kvm_regs struct. */
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off = core_reg_offset_from_id(reg->id);
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if (off >= sizeof(*regs) / KVM_REG_SIZE(reg->id))
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return -ENOENT;
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if (get_user(val, uaddr) != 0)
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return -EFAULT;
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if (off == KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr)) {
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unsigned long mode = val & MODE_MASK;
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switch (mode) {
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case USR_MODE:
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case FIQ_MODE:
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case IRQ_MODE:
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case SVC_MODE:
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case ABT_MODE:
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case UND_MODE:
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break;
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default:
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return -EINVAL;
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}
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}
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((u32 *)regs)[off] = val;
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return 0;
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}
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int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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{
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return -EINVAL;
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}
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#ifndef CONFIG_KVM_ARM_TIMER
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#define NUM_TIMER_REGS 0
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static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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return 0;
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}
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static bool is_timer_reg(u64 index)
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{
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return false;
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}
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#else
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#define NUM_TIMER_REGS 3
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static bool is_timer_reg(u64 index)
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{
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switch (index) {
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case KVM_REG_ARM_TIMER_CTL:
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case KVM_REG_ARM_TIMER_CNT:
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case KVM_REG_ARM_TIMER_CVAL:
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return true;
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}
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return false;
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}
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static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
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return -EFAULT;
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uindices++;
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if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
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return -EFAULT;
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uindices++;
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if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
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return -EFAULT;
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return 0;
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}
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#endif
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static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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int ret;
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ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
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if (ret != 0)
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return ret;
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return kvm_arm_timer_set_reg(vcpu, reg->id, val);
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}
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static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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val = kvm_arm_timer_get_reg(vcpu, reg->id);
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return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id));
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}
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static unsigned long num_core_regs(void)
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{
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return sizeof(struct kvm_regs) / sizeof(u32);
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}
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/**
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* kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
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*
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* This is for all registers.
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*/
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unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
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{
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return num_core_regs() + kvm_arm_num_coproc_regs(vcpu)
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+ NUM_TIMER_REGS;
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}
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/**
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* kvm_arm_copy_reg_indices - get indices of all registers.
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*
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* We do core registers right here, then we apppend coproc regs.
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*/
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int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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unsigned int i;
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const u64 core_reg = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_CORE;
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int ret;
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for (i = 0; i < sizeof(struct kvm_regs)/sizeof(u32); i++) {
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if (put_user(core_reg | i, uindices))
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return -EFAULT;
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uindices++;
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}
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ret = copy_timer_indices(vcpu, uindices);
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if (ret)
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return ret;
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uindices += NUM_TIMER_REGS;
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return kvm_arm_copy_coproc_indices(vcpu, uindices);
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}
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int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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/* We currently use nothing arch-specific in upper 32 bits */
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if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM >> 32)
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return -EINVAL;
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/* Register group 16 means we want a core register. */
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return get_core_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return get_timer_reg(vcpu, reg);
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return kvm_arm_coproc_get_reg(vcpu, reg);
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}
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int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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/* We currently use nothing arch-specific in upper 32 bits */
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if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM >> 32)
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return -EINVAL;
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/* Register group 16 means we set a core register. */
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return set_core_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return set_timer_reg(vcpu, reg);
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return kvm_arm_coproc_set_reg(vcpu, reg);
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}
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int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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return -EINVAL;
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}
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int __attribute_const__ kvm_target_cpu(void)
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{
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switch (read_cpuid_part()) {
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case ARM_CPU_PART_CORTEX_A7:
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return KVM_ARM_TARGET_CORTEX_A7;
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case ARM_CPU_PART_CORTEX_A15:
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return KVM_ARM_TARGET_CORTEX_A15;
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default:
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return -EINVAL;
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}
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}
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int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
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const struct kvm_vcpu_init *init)
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{
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unsigned int i;
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/* We can only cope with guest==host and only on A15/A7 (for now). */
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if (init->target != kvm_target_cpu())
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return -EINVAL;
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vcpu->arch.target = init->target;
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bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES);
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/* -ENOENT for unknown features, -EINVAL for invalid combinations. */
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for (i = 0; i < sizeof(init->features) * 8; i++) {
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if (test_bit(i, (void *)init->features)) {
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if (i >= KVM_VCPU_MAX_FEATURES)
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return -ENOENT;
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set_bit(i, vcpu->arch.features);
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}
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}
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/* Now we know what it is, we can reset it. */
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return kvm_reset_vcpu(vcpu);
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}
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int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
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{
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int target = kvm_target_cpu();
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if (target < 0)
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return -ENODEV;
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memset(init, 0, sizeof(*init));
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/*
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* For now, we don't return any features.
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* In future, we might use features to return target
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* specific features available for the preferred
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* target type.
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*/
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init->target = (__u32)target;
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return 0;
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}
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int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
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struct kvm_translation *tr)
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{
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return -EINVAL;
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}
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