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73f7e05609
Abstract the alloc_cqc() into several parts and separate the process unrelated to allocating CQC. Link: https://lore.kernel.org/r/20220302064830.61706-10-liangwenpeng@huawei.com Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
534 lines
14 KiB
C
534 lines
14 KiB
C
/*
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* Copyright (c) 2016 Hisilicon Limited.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <rdma/ib_umem.h>
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#include <rdma/uverbs_ioctl.h>
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#include "hns_roce_device.h"
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#include "hns_roce_cmd.h"
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#include "hns_roce_hem.h"
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#include "hns_roce_common.h"
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static u8 get_least_load_bankid_for_cq(struct hns_roce_bank *bank)
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{
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u32 least_load = bank[0].inuse;
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u8 bankid = 0;
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u32 bankcnt;
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u8 i;
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for (i = 1; i < HNS_ROCE_CQ_BANK_NUM; i++) {
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bankcnt = bank[i].inuse;
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if (bankcnt < least_load) {
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least_load = bankcnt;
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bankid = i;
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}
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}
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return bankid;
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}
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static int alloc_cqn(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
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{
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struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
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struct hns_roce_bank *bank;
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u8 bankid;
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int id;
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mutex_lock(&cq_table->bank_mutex);
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bankid = get_least_load_bankid_for_cq(cq_table->bank);
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bank = &cq_table->bank[bankid];
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id = ida_alloc_range(&bank->ida, bank->min, bank->max, GFP_KERNEL);
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if (id < 0) {
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mutex_unlock(&cq_table->bank_mutex);
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return id;
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}
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/* the lower 2 bits is bankid */
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hr_cq->cqn = (id << CQ_BANKID_SHIFT) | bankid;
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bank->inuse++;
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mutex_unlock(&cq_table->bank_mutex);
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return 0;
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}
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static inline u8 get_cq_bankid(unsigned long cqn)
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{
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/* The lower 2 bits of CQN are used to hash to different banks */
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return (u8)(cqn & GENMASK(1, 0));
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}
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static void free_cqn(struct hns_roce_dev *hr_dev, unsigned long cqn)
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{
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struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
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struct hns_roce_bank *bank;
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bank = &cq_table->bank[get_cq_bankid(cqn)];
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ida_free(&bank->ida, cqn >> CQ_BANKID_SHIFT);
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mutex_lock(&cq_table->bank_mutex);
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bank->inuse--;
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mutex_unlock(&cq_table->bank_mutex);
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}
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static int hns_roce_create_cqc(struct hns_roce_dev *hr_dev,
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struct hns_roce_cq *hr_cq,
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u64 *mtts, dma_addr_t dma_handle)
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{
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_cmd_mailbox *mailbox;
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int ret;
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mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
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if (IS_ERR(mailbox)) {
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ibdev_err(ibdev, "failed to alloc mailbox for CQC.\n");
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return PTR_ERR(mailbox);
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}
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hr_dev->hw->write_cqc(hr_dev, hr_cq, mailbox->buf, mtts, dma_handle);
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ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_CQC,
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hr_cq->cqn);
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if (ret)
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ibdev_err(ibdev,
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"failed to send create cmd for CQ(0x%lx), ret = %d.\n",
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hr_cq->cqn, ret);
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hns_roce_free_cmd_mailbox(hr_dev, mailbox);
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return ret;
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}
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static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
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{
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struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
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struct ib_device *ibdev = &hr_dev->ib_dev;
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u64 mtts[MTT_MIN_COUNT] = {};
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dma_addr_t dma_handle;
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int ret;
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ret = hns_roce_mtr_find(hr_dev, &hr_cq->mtr, 0, mtts, ARRAY_SIZE(mtts),
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&dma_handle);
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if (!ret) {
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ibdev_err(ibdev, "failed to find CQ mtr, ret = %d.\n", ret);
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return -EINVAL;
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}
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/* Get CQC memory HEM(Hardware Entry Memory) table */
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ret = hns_roce_table_get(hr_dev, &cq_table->table, hr_cq->cqn);
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if (ret) {
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ibdev_err(ibdev, "failed to get CQ(0x%lx) context, ret = %d.\n",
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hr_cq->cqn, ret);
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return ret;
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}
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ret = xa_err(xa_store(&cq_table->array, hr_cq->cqn, hr_cq, GFP_KERNEL));
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if (ret) {
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ibdev_err(ibdev, "failed to xa_store CQ, ret = %d.\n", ret);
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goto err_put;
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}
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ret = hns_roce_create_cqc(hr_dev, hr_cq, mtts, dma_handle);
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if (ret)
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goto err_xa;
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return 0;
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err_xa:
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xa_erase(&cq_table->array, hr_cq->cqn);
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err_put:
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hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn);
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return ret;
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}
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static void free_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
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{
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struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
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struct device *dev = hr_dev->dev;
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int ret;
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ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_CQC,
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hr_cq->cqn);
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if (ret)
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dev_err(dev, "DESTROY_CQ failed (%d) for CQN %06lx\n", ret,
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hr_cq->cqn);
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xa_erase(&cq_table->array, hr_cq->cqn);
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/* Waiting interrupt process procedure carried out */
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synchronize_irq(hr_dev->eq_table.eq[hr_cq->vector].irq);
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/* wait for all interrupt processed */
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if (refcount_dec_and_test(&hr_cq->refcount))
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complete(&hr_cq->free);
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wait_for_completion(&hr_cq->free);
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hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn);
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}
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static int alloc_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq,
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struct ib_udata *udata, unsigned long addr)
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{
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_buf_attr buf_attr = {};
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int ret;
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buf_attr.page_shift = hr_dev->caps.cqe_buf_pg_sz + PAGE_SHIFT;
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buf_attr.region[0].size = hr_cq->cq_depth * hr_cq->cqe_size;
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buf_attr.region[0].hopnum = hr_dev->caps.cqe_hop_num;
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buf_attr.region_count = 1;
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ret = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr,
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hr_dev->caps.cqe_ba_pg_sz + PAGE_SHIFT,
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udata, addr);
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if (ret)
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ibdev_err(ibdev, "failed to alloc CQ mtr, ret = %d.\n", ret);
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return ret;
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}
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static void free_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
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{
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hns_roce_mtr_destroy(hr_dev, &hr_cq->mtr);
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}
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static int alloc_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq,
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struct ib_udata *udata, unsigned long addr,
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struct hns_roce_ib_create_cq_resp *resp)
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{
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bool has_db = hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQ_RECORD_DB;
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struct hns_roce_ucontext *uctx;
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int err;
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if (udata) {
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if (has_db &&
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udata->outlen >= offsetofend(typeof(*resp), cap_flags)) {
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uctx = rdma_udata_to_drv_context(udata,
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struct hns_roce_ucontext, ibucontext);
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err = hns_roce_db_map_user(uctx, addr, &hr_cq->db);
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if (err)
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return err;
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hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB;
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resp->cap_flags |= HNS_ROCE_CQ_FLAG_RECORD_DB;
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}
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} else {
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if (has_db) {
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err = hns_roce_alloc_db(hr_dev, &hr_cq->db, 1);
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if (err)
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return err;
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hr_cq->set_ci_db = hr_cq->db.db_record;
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*hr_cq->set_ci_db = 0;
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hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB;
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}
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hr_cq->db_reg = hr_dev->reg_base + hr_dev->odb_offset +
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DB_REG_OFFSET * hr_dev->priv_uar.index;
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}
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return 0;
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}
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static void free_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq,
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struct ib_udata *udata)
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{
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struct hns_roce_ucontext *uctx;
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if (!(hr_cq->flags & HNS_ROCE_CQ_FLAG_RECORD_DB))
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return;
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hr_cq->flags &= ~HNS_ROCE_CQ_FLAG_RECORD_DB;
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if (udata) {
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uctx = rdma_udata_to_drv_context(udata,
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struct hns_roce_ucontext,
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ibucontext);
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hns_roce_db_unmap_user(uctx, &hr_cq->db);
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} else {
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hns_roce_free_db(hr_dev, &hr_cq->db);
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}
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}
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static int verify_cq_create_attr(struct hns_roce_dev *hr_dev,
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const struct ib_cq_init_attr *attr)
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{
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struct ib_device *ibdev = &hr_dev->ib_dev;
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if (!attr->cqe || attr->cqe > hr_dev->caps.max_cqes) {
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ibdev_err(ibdev, "failed to check CQ count %u, max = %u.\n",
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attr->cqe, hr_dev->caps.max_cqes);
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return -EINVAL;
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}
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if (attr->comp_vector >= hr_dev->caps.num_comp_vectors) {
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ibdev_err(ibdev, "failed to check CQ vector = %u, max = %d.\n",
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attr->comp_vector, hr_dev->caps.num_comp_vectors);
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return -EINVAL;
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}
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return 0;
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}
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static int get_cq_ucmd(struct hns_roce_cq *hr_cq, struct ib_udata *udata,
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struct hns_roce_ib_create_cq *ucmd)
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{
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struct ib_device *ibdev = hr_cq->ib_cq.device;
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int ret;
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ret = ib_copy_from_udata(ucmd, udata, min(udata->inlen, sizeof(*ucmd)));
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if (ret) {
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ibdev_err(ibdev, "failed to copy CQ udata, ret = %d.\n", ret);
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return ret;
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}
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return 0;
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}
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static void set_cq_param(struct hns_roce_cq *hr_cq, u32 cq_entries, int vector,
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struct hns_roce_ib_create_cq *ucmd)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device);
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cq_entries = max(cq_entries, hr_dev->caps.min_cqes);
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cq_entries = roundup_pow_of_two(cq_entries);
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hr_cq->ib_cq.cqe = cq_entries - 1; /* used as cqe index */
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hr_cq->cq_depth = cq_entries;
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hr_cq->vector = vector;
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spin_lock_init(&hr_cq->lock);
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INIT_LIST_HEAD(&hr_cq->sq_list);
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INIT_LIST_HEAD(&hr_cq->rq_list);
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}
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static int set_cqe_size(struct hns_roce_cq *hr_cq, struct ib_udata *udata,
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struct hns_roce_ib_create_cq *ucmd)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device);
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if (!udata) {
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hr_cq->cqe_size = hr_dev->caps.cqe_sz;
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return 0;
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}
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if (udata->inlen >= offsetofend(typeof(*ucmd), cqe_size)) {
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if (ucmd->cqe_size != HNS_ROCE_V2_CQE_SIZE &&
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ucmd->cqe_size != HNS_ROCE_V3_CQE_SIZE) {
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ibdev_err(&hr_dev->ib_dev,
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"invalid cqe size %u.\n", ucmd->cqe_size);
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return -EINVAL;
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}
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hr_cq->cqe_size = ucmd->cqe_size;
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} else {
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hr_cq->cqe_size = HNS_ROCE_V2_CQE_SIZE;
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}
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return 0;
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}
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int hns_roce_create_cq(struct ib_cq *ib_cq, const struct ib_cq_init_attr *attr,
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struct ib_udata *udata)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device);
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struct hns_roce_ib_create_cq_resp resp = {};
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struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq);
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_ib_create_cq ucmd = {};
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int ret;
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if (attr->flags)
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return -EOPNOTSUPP;
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ret = verify_cq_create_attr(hr_dev, attr);
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if (ret)
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return ret;
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if (udata) {
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ret = get_cq_ucmd(hr_cq, udata, &ucmd);
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if (ret)
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return ret;
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}
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set_cq_param(hr_cq, attr->cqe, attr->comp_vector, &ucmd);
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ret = set_cqe_size(hr_cq, udata, &ucmd);
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if (ret)
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return ret;
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ret = alloc_cq_buf(hr_dev, hr_cq, udata, ucmd.buf_addr);
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if (ret) {
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ibdev_err(ibdev, "failed to alloc CQ buf, ret = %d.\n", ret);
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return ret;
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}
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ret = alloc_cq_db(hr_dev, hr_cq, udata, ucmd.db_addr, &resp);
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if (ret) {
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ibdev_err(ibdev, "failed to alloc CQ db, ret = %d.\n", ret);
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goto err_cq_buf;
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}
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ret = alloc_cqn(hr_dev, hr_cq);
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if (ret) {
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ibdev_err(ibdev, "failed to alloc CQN, ret = %d.\n", ret);
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goto err_cq_db;
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}
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ret = alloc_cqc(hr_dev, hr_cq);
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if (ret) {
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ibdev_err(ibdev,
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"failed to alloc CQ context, ret = %d.\n", ret);
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goto err_cqn;
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}
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if (udata) {
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resp.cqn = hr_cq->cqn;
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ret = ib_copy_to_udata(udata, &resp,
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min(udata->outlen, sizeof(resp)));
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if (ret)
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goto err_cqc;
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}
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hr_cq->cons_index = 0;
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hr_cq->arm_sn = 1;
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refcount_set(&hr_cq->refcount, 1);
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init_completion(&hr_cq->free);
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return 0;
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err_cqc:
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free_cqc(hr_dev, hr_cq);
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err_cqn:
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free_cqn(hr_dev, hr_cq->cqn);
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err_cq_db:
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free_cq_db(hr_dev, hr_cq, udata);
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err_cq_buf:
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free_cq_buf(hr_dev, hr_cq);
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return ret;
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}
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int hns_roce_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device);
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struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq);
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free_cqc(hr_dev, hr_cq);
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free_cqn(hr_dev, hr_cq->cqn);
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free_cq_db(hr_dev, hr_cq, udata);
|
|
free_cq_buf(hr_dev, hr_cq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn)
|
|
{
|
|
struct hns_roce_cq *hr_cq;
|
|
struct ib_cq *ibcq;
|
|
|
|
hr_cq = xa_load(&hr_dev->cq_table.array,
|
|
cqn & (hr_dev->caps.num_cqs - 1));
|
|
if (!hr_cq) {
|
|
dev_warn(hr_dev->dev, "Completion event for bogus CQ 0x%06x\n",
|
|
cqn);
|
|
return;
|
|
}
|
|
|
|
++hr_cq->arm_sn;
|
|
ibcq = &hr_cq->ib_cq;
|
|
if (ibcq->comp_handler)
|
|
ibcq->comp_handler(ibcq, ibcq->cq_context);
|
|
}
|
|
|
|
void hns_roce_cq_event(struct hns_roce_dev *hr_dev, u32 cqn, int event_type)
|
|
{
|
|
struct device *dev = hr_dev->dev;
|
|
struct hns_roce_cq *hr_cq;
|
|
struct ib_event event;
|
|
struct ib_cq *ibcq;
|
|
|
|
hr_cq = xa_load(&hr_dev->cq_table.array,
|
|
cqn & (hr_dev->caps.num_cqs - 1));
|
|
if (!hr_cq) {
|
|
dev_warn(dev, "Async event for bogus CQ 0x%06x\n", cqn);
|
|
return;
|
|
}
|
|
|
|
if (event_type != HNS_ROCE_EVENT_TYPE_CQ_ID_INVALID &&
|
|
event_type != HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR &&
|
|
event_type != HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW) {
|
|
dev_err(dev, "Unexpected event type 0x%x on CQ 0x%06x\n",
|
|
event_type, cqn);
|
|
return;
|
|
}
|
|
|
|
refcount_inc(&hr_cq->refcount);
|
|
|
|
ibcq = &hr_cq->ib_cq;
|
|
if (ibcq->event_handler) {
|
|
event.device = ibcq->device;
|
|
event.element.cq = ibcq;
|
|
event.event = IB_EVENT_CQ_ERR;
|
|
ibcq->event_handler(&event, ibcq->cq_context);
|
|
}
|
|
|
|
if (refcount_dec_and_test(&hr_cq->refcount))
|
|
complete(&hr_cq->free);
|
|
}
|
|
|
|
void hns_roce_init_cq_table(struct hns_roce_dev *hr_dev)
|
|
{
|
|
struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
|
|
unsigned int reserved_from_bot;
|
|
unsigned int i;
|
|
|
|
mutex_init(&cq_table->bank_mutex);
|
|
xa_init(&cq_table->array);
|
|
|
|
reserved_from_bot = hr_dev->caps.reserved_cqs;
|
|
|
|
for (i = 0; i < reserved_from_bot; i++) {
|
|
cq_table->bank[get_cq_bankid(i)].inuse++;
|
|
cq_table->bank[get_cq_bankid(i)].min++;
|
|
}
|
|
|
|
for (i = 0; i < HNS_ROCE_CQ_BANK_NUM; i++) {
|
|
ida_init(&cq_table->bank[i].ida);
|
|
cq_table->bank[i].max = hr_dev->caps.num_cqs /
|
|
HNS_ROCE_CQ_BANK_NUM - 1;
|
|
}
|
|
}
|
|
|
|
void hns_roce_cleanup_cq_table(struct hns_roce_dev *hr_dev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < HNS_ROCE_CQ_BANK_NUM; i++)
|
|
ida_destroy(&hr_dev->cq_table.bank[i].ida);
|
|
}
|