mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-06 10:34:09 +08:00
65ec0a7d24
Core changes:
- A semantic change to handle pinmux and pinconf in explicit order
while up until now we depended on the semantic order in the
device tree. The device tree is a functional programming
language and does not imply any order, so the right thing is
for the pin control core to provide these semantics.
- Add a new pinmux-select debugfs file which makes it possible to
go in and select functions for a pin manually (iteratively, at
the prompt) for debugging purposes.
- Fixes to gpio regmap handling for a new pin control driver
making use of regmap-gpio.
- Use octal permissions on debugfs files.
New drivers:
- A massive rewrite of the former custom pin control driver for
MIPS Broadcom devices to instead use the pin control subsystem.
New pin control drivers for BCM6345, BCM6328, BCM6358, BCM6362,
BCM6368, BCM63268 and BCM6318 SoC variants are implemented.
- Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
PMR735B in the Qualcomm PMIC GPIO driver. Also the two GPIOs
on PM8008 are supported.
- Support for the Rockchip RK3568/RK3566 pin controller.
- Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and
X2000.
- Support for Mediatek MTK8195.
- Add a new Xilinx ZynqMP pin control driver.
Driver improvements and non-urgent fixes:
- Modularization and improvements of the Rockchip drivers.
- Some new pins added to the description of new Renesas SoCs.
- Clarifications of the GPIO base calculation in the Intel driver.
- Fix the function names for the MPP54 and MPP55 pins in the Armada
CP110 pin controller.
- GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
- Support for ACPI probing of the Qualcomm SC8180x.
- Fix interrupt clear status on rockchip
- Fix some missing pins on the Ingenic JZ4770, some semantic
fixes for the behaviour of the Ingenic pin controller.
Add DMIC pins for JZ4780, X1000, X1500 and X1830.
- A slew of janitorial like of_node_put() calls.
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Merge tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"There is a lot going on!
Core changes:
- A semantic change to handle pinmux and pinconf in explicit order
while up until now we depended on the semantic order in the device
tree. The device tree is a functional programming language and does
not imply any order, so the right thing is for the pin control core
to provide these semantics.
- Add a new pinmux-select debugfs file which makes it possible to go
in and select functions for a pin manually (iteratively, at the
prompt) for debugging purposes.
- Fixes to gpio regmap handling for a new pin control driver making
use of regmap-gpio.
- Use octal permissions on debugfs files.
New drivers:
- A massive rewrite of the former custom pin control driver for MIPS
Broadcom devices to instead use the pin control subsystem. New pin
control drivers for BCM6345, BCM6328, BCM6358, BCM6362, BCM6368,
BCM63268 and BCM6318 SoC variants are implemented.
- Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B
in the Qualcomm PMIC GPIO driver. Also the two GPIOs on PM8008 are
supported.
- Support for the Rockchip RK3568/RK3566 pin controller.
- Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and X2000.
- Support for Mediatek MTK8195.
- Add a new Xilinx ZynqMP pin control driver.
Driver improvements and non-urgent fixes:
- Modularization and improvements of the Rockchip drivers.
- Some new pins added to the description of new Renesas SoCs.
- Clarifications of the GPIO base calculation in the Intel driver.
- Fix the function names for the MPP54 and MPP55 pins in the Armada
CP110 pin controller.
- GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
- Support for ACPI probing of the Qualcomm SC8180x.
- Fix interrupt clear status on rockchip
- Fix some missing pins on the Ingenic JZ4770, some semantic fixes
for the behaviour of the Ingenic pin controller. Add DMIC pins for
JZ4780, X1000, X1500 and X1830.
- A slew of janitorial like of_node_put() calls"
* tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
pinctrl: Add Xilinx ZynqMP pinctrl driver support
firmware: xilinx: Add pinctrl support
pinctrl: rockchip: do coding style for mux route struct
pinctrl: Add PIN_CONFIG_MODE_PWM to enum pin_config_param
pinctrl: Introduce MODE group in enum pin_config_param
pinctrl: Keep enum pin_config_param ordered by name
dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver
pinctrl: core: Fix kernel doc string for pin_get_name()
pinctrl: mediatek: use spin lock in mtk_rmw
pinctrl: add drive for I2C related pins on MT8195
pinctrl: add pinctrl driver on mt8195
dt-bindings: pinctrl: mt8195: add pinctrl file and binding document
pinctrl: Ingenic: Add pinctrl driver for X2000.
pinctrl: Ingenic: Add pinctrl driver for JZ4775.
pinctrl: Ingenic: Add pinctrl driver for JZ4755.
pinctrl: Ingenic: Add pinctrl driver for JZ4750.
pinctrl: Ingenic: Add pinctrl driver for JZ4730.
dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.
pinctrl: Ingenic: Reformat the code.
pinctrl: Ingenic: Add DMIC pins support for Ingenic SoCs.
...
330 lines
7.7 KiB
Plaintext
330 lines
7.7 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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menu "Platform selection"
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config ARCH_ACTIONS
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bool "Actions Semi Platforms"
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select OWL_TIMER
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select PINCTRL
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help
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This enables support for the Actions Semiconductor S900 SoC family.
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config ARCH_SUNXI
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bool "Allwinner sunxi 64-bit SoC Family"
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select ARCH_HAS_RESET_CONTROLLER
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select GENERIC_IRQ_CHIP
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select IRQ_DOMAIN_HIERARCHY
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select IRQ_FASTEOI_HIERARCHY_HANDLERS
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select PINCTRL
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select RESET_CONTROLLER
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help
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This enables support for Allwinner sunxi based SoCs like the A64.
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config ARCH_ALPINE
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bool "Annapurna Labs Alpine platform"
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select ALPINE_MSI if PCI
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help
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This enables support for the Annapurna Labs Alpine
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Soc family.
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config ARCH_APPLE
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bool "Apple Silicon SoC family"
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select APPLE_AIC
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help
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This enables support for Apple's in-house ARM SoC family, starting
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with the Apple M1.
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config ARCH_BCM2835
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bool "Broadcom BCM2835 family"
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select TIMER_OF
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select GPIOLIB
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select MFD_CORE
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select PINCTRL
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select PINCTRL_BCM2835
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select ARM_AMBA
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select ARM_GIC
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select ARM_TIMER_SP804
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select BRCMSTB_L2_IRQ
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help
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This enables support for the Broadcom BCM2837 and BCM2711 SoC.
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These SoCs are used in the Raspberry Pi 3 and 4 devices.
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config ARCH_BCM4908
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bool "Broadcom BCM4908 family"
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select GPIOLIB
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help
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This enables support for the Broadcom BCM4906, BCM4908 and
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BCM49408 SoCs. These SoCs use Brahma-B53 cores and can be
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found in home routers.
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config ARCH_BCM_IPROC
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bool "Broadcom iProc SoC Family"
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select COMMON_CLK_IPROC
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select GPIOLIB
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select PINCTRL
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help
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This enables support for Broadcom iProc based SoCs
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config ARCH_BERLIN
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bool "Marvell Berlin SoC Family"
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select DW_APB_ICTL
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select DW_APB_TIMER_OF
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select GPIOLIB
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select PINCTRL
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help
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This enables support for Marvell Berlin SoC Family
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config ARCH_BITMAIN
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bool "Bitmain SoC Platforms"
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help
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This enables support for the Bitmain SoC Family.
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config ARCH_BRCMSTB
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bool "Broadcom Set-Top-Box SoCs"
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select ARCH_HAS_RESET_CONTROLLER
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select BCM7038_L1_IRQ
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select BRCMSTB_L2_IRQ
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select GENERIC_IRQ_CHIP
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select PINCTRL
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help
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This enables support for Broadcom's ARMv8 Set Top Box SoCs
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config ARCH_EXYNOS
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bool "ARMv8 based Samsung Exynos SoC family"
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select COMMON_CLK_SAMSUNG
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select EXYNOS_CHIPID
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select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS
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select EXYNOS_PMU
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select HAVE_S3C_RTC if RTC_CLASS
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select PINCTRL
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select PINCTRL_EXYNOS
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select PM_GENERIC_DOMAINS if PM
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select SOC_SAMSUNG
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help
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This enables support for ARMv8 based Samsung Exynos SoC family.
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config ARCH_SPARX5
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bool "ARMv8 based Microchip Sparx5 SoC family"
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select PINCTRL
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select DW_APB_TIMER_OF
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help
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This enables support for the Microchip Sparx5 ARMv8-based
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SoC family of TSN-capable gigabit switches.
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The SparX-5 Ethernet switch family provides a rich set of
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switching features such as advanced TCAM-based VLAN and QoS
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processing enabling delivery of differentiated services, and
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security through TCAM-based frame processing using versatile
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content aware processor (VCAP).
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config ARCH_K3
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bool "Texas Instruments Inc. K3 multicore SoC architecture"
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select PM_GENERIC_DOMAINS if PM
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select MAILBOX
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select SOC_TI
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select TI_MESSAGE_MANAGER
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select TI_SCI_PROTOCOL
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select TI_SCI_INTR_IRQCHIP
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select TI_SCI_INTA_IRQCHIP
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select TI_K3_SOCINFO
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help
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This enables support for Texas Instruments' K3 multicore SoC
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architecture.
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config ARCH_LAYERSCAPE
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bool "ARMv8 based Freescale Layerscape SoC family"
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select EDAC_SUPPORT
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help
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This enables support for the Freescale Layerscape SoC family.
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config ARCH_LG1K
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bool "LG Electronics LG1K SoC Family"
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help
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This enables support for LG Electronics LG1K SoC Family
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config ARCH_HISI
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bool "Hisilicon SoC Family"
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select ARM_TIMER_SP804
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select HISILICON_IRQ_MBIGEN if PCI
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select PINCTRL
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help
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This enables support for Hisilicon ARMv8 SoC family
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config ARCH_KEEMBAY
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bool "Keem Bay SoC"
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help
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This enables support for Intel Movidius SoC code-named Keem Bay.
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config ARCH_MEDIATEK
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bool "MediaTek SoC Family"
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select ARM_GIC
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select PINCTRL
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select MTK_TIMER
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help
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This enables support for MediaTek MT27xx, MT65xx, MT76xx
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& MT81xx ARMv8 SoCs
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config ARCH_MESON
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bool "Amlogic Platforms"
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select MESON_IRQ_GPIO
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help
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This enables support for the arm64 based Amlogic SoCs
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such as the s905, S905X/D, S912, A113X/D or S905X/D2
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config ARCH_MVEBU
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bool "Marvell EBU SoC Family"
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select ARMADA_AP806_SYSCON
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select ARMADA_CP110_SYSCON
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select ARMADA_37XX_CLK
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select GPIOLIB
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select GPIOLIB_IRQCHIP
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select MVEBU_GICP
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select MVEBU_ICU
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select MVEBU_ODMI
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select MVEBU_PIC
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select MVEBU_SEI
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select OF_GPIO
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select PINCTRL
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select PINCTRL_ARMADA_37XX
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select PINCTRL_ARMADA_AP806
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select PINCTRL_ARMADA_CP110
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help
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This enables support for Marvell EBU familly, including:
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- Armada 3700 SoC Family
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- Armada 7K SoC Family
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- Armada 8K SoC Family
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config ARCH_MXC
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bool "ARMv8 based NXP i.MX SoC family"
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select ARM64_ERRATUM_843419
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select ARM64_ERRATUM_845719 if COMPAT
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select IMX_GPCV2
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select IMX_GPCV2_PM_DOMAINS
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select PM
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select PM_GENERIC_DOMAINS
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select SOC_BUS
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select TIMER_IMX_SYS_CTR
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help
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This enables support for the ARMv8 based SoCs in the
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NXP i.MX family.
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config ARCH_QCOM
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bool "Qualcomm Platforms"
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select GPIOLIB
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select PINCTRL
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help
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This enables support for the ARMv8 based Qualcomm chipsets.
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config ARCH_REALTEK
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bool "Realtek Platforms"
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select RESET_CONTROLLER
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help
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This enables support for the ARMv8 based Realtek chipsets,
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like the RTD1295.
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config ARCH_RENESAS
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bool "Renesas SoC Platforms"
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select GPIOLIB
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select PINCTRL
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select SOC_BUS
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help
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This enables support for the ARMv8 based Renesas SoCs.
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config ARCH_ROCKCHIP
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bool "Rockchip Platforms"
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select ARCH_HAS_RESET_CONTROLLER
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select PINCTRL
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select PM
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select ROCKCHIP_TIMER
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help
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This enables support for the ARMv8 based Rockchip chipsets,
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like the RK3368.
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config ARCH_S32
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bool "NXP S32 SoC Family"
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help
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This enables support for the NXP S32 family of processors.
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config ARCH_SEATTLE
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bool "AMD Seattle SoC Family"
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help
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This enables support for AMD Seattle SOC Family
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config ARCH_INTEL_SOCFPGA
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bool "Intel's SoCFPGA ARMv8 Families"
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help
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This enables support for Intel's SoCFPGA ARMv8 families:
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Stratix 10 (ex. Altera), Agilex and eASIC N5X.
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config ARCH_SYNQUACER
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bool "Socionext SynQuacer SoC Family"
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config ARCH_TEGRA
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bool "NVIDIA Tegra SoC Family"
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select ARCH_HAS_RESET_CONTROLLER
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select ARM_GIC_PM
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select CLKSRC_MMIO
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select TIMER_OF
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select GPIOLIB
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select PINCTRL
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select PM
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select PM_GENERIC_DOMAINS
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select RESET_CONTROLLER
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help
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This enables support for the NVIDIA Tegra SoC family.
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config ARCH_SPRD
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bool "Spreadtrum SoC platform"
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help
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Support for Spreadtrum ARM based SoCs
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config ARCH_THUNDER
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bool "Cavium Inc. Thunder SoC Family"
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help
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This enables support for Cavium's Thunder Family of SoCs.
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config ARCH_THUNDER2
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bool "Cavium ThunderX2 Server Processors"
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select GPIOLIB
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help
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This enables support for Cavium's ThunderX2 CN99XX family of
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server processors.
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config ARCH_UNIPHIER
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bool "Socionext UniPhier SoC Family"
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select ARCH_HAS_RESET_CONTROLLER
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select PINCTRL
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select RESET_CONTROLLER
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help
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This enables support for Socionext UniPhier SoC family.
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config ARCH_VEXPRESS
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bool "ARMv8 software model (Versatile Express)"
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select GPIOLIB
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select PM
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select PM_GENERIC_DOMAINS
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help
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This enables support for the ARMv8 software model (Versatile
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Express).
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config ARCH_VISCONTI
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bool "Toshiba Visconti SoC Family"
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select PINCTRL
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select PINCTRL_VISCONTI
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help
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This enables support for Toshiba Visconti SoCs Family.
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config ARCH_VULCAN
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def_bool n
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config ARCH_XGENE
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bool "AppliedMicro X-Gene SOC Family"
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help
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This enables support for AppliedMicro X-Gene SOC Family
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config ARCH_ZYNQMP
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bool "Xilinx ZynqMP Family"
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help
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This enables support for Xilinx ZynqMP Family
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endmenu
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