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After moving the the include files there were a few clean-ups: 1) Some files used #include <asm-ia64/xyz.h>, changed to <asm/xyz.h> 2) Some comments alerted maintainers to look at various header files to make matching updates if certain code were to be changed. Updated these comments to use the new include paths. 3) Some header files mentioned their own names in initial comments. Just deleted these self references. Signed-off-by: Tony Luck <tony.luck@intel.com>
127 lines
3.2 KiB
C
127 lines
3.2 KiB
C
/*
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* Copyright (C) 2002, Erich Focht, NEC
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _ASM_IA64_TOPOLOGY_H
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#define _ASM_IA64_TOPOLOGY_H
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#include <asm/acpi.h>
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#include <asm/numa.h>
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#include <asm/smp.h>
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#ifdef CONFIG_NUMA
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/* Nodes w/o CPUs are preferred for memory allocations, see build_zonelists */
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#define PENALTY_FOR_NODE_WITH_CPUS 255
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/*
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* Distance above which we begin to use zone reclaim
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*/
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#define RECLAIM_DISTANCE 15
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/*
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* Returns the number of the node containing CPU 'cpu'
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*/
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#define cpu_to_node(cpu) (int)(cpu_to_node_map[cpu])
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/*
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* Returns a bitmask of CPUs on Node 'node'.
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*/
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#define node_to_cpumask(node) (node_to_cpu_mask[node])
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/*
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* Returns the number of the node containing Node 'nid'.
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* Not implemented here. Multi-level hierarchies detected with
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* the help of node_distance().
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*/
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#define parent_node(nid) (nid)
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/*
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* Returns the number of the first CPU on Node 'node'.
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*/
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#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
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/*
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* Determines the node for a given pci bus
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*/
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#define pcibus_to_node(bus) PCI_CONTROLLER(bus)->node
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void build_cpu_to_node_map(void);
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#define SD_CPU_INIT (struct sched_domain) { \
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.span = CPU_MASK_NONE, \
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.parent = NULL, \
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.child = NULL, \
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.groups = NULL, \
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.min_interval = 1, \
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.max_interval = 4, \
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.busy_factor = 64, \
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.imbalance_pct = 125, \
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.cache_nice_tries = 2, \
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.busy_idx = 2, \
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.idle_idx = 1, \
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.newidle_idx = 2, \
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.wake_idx = 1, \
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.forkexec_idx = 1, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_NEWIDLE \
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| SD_BALANCE_EXEC \
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| SD_WAKE_AFFINE, \
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.last_balance = jiffies, \
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.balance_interval = 1, \
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.nr_balance_failed = 0, \
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}
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/* sched_domains SD_NODE_INIT for IA64 NUMA machines */
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#define SD_NODE_INIT (struct sched_domain) { \
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.span = CPU_MASK_NONE, \
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.parent = NULL, \
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.child = NULL, \
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.groups = NULL, \
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.min_interval = 8, \
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.max_interval = 8*(min(num_online_cpus(), 32)), \
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.busy_factor = 64, \
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.imbalance_pct = 125, \
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.cache_nice_tries = 2, \
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.busy_idx = 3, \
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.idle_idx = 2, \
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.newidle_idx = 2, \
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.wake_idx = 1, \
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.forkexec_idx = 1, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_EXEC \
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| SD_BALANCE_FORK \
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| SD_SERIALIZE \
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| SD_WAKE_BALANCE, \
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.last_balance = jiffies, \
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.balance_interval = 64, \
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.nr_balance_failed = 0, \
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}
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#endif /* CONFIG_NUMA */
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#ifdef CONFIG_SMP
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#define topology_physical_package_id(cpu) (cpu_data(cpu)->socket_id)
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#define topology_core_id(cpu) (cpu_data(cpu)->core_id)
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#define topology_core_siblings(cpu) (cpu_core_map[cpu])
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#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
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#define smt_capable() (smp_num_siblings > 1)
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#endif
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extern void arch_fix_phys_package_id(int num, u32 slot);
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#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \
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CPU_MASK_ALL : \
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node_to_cpumask(pcibus_to_node(bus)) \
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)
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#include <asm-generic/topology.h>
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#endif /* _ASM_IA64_TOPOLOGY_H */
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