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This patch adds a driver for Fixed MMIO clock. The driver reads a clock frequency value from a single 32-bit memory mapped register and registers it as a fixed rate clock. It can be enabled with COMMON_CLK_FIXED_MMIO Kconfig option. Signed-off-by: Jan Kotas <jank@cadence.com> [sboyd@kernel.org: Make of_fixed_mmio_clk_setup() static, use clk_hw based APIs] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
102 lines
2.3 KiB
C
102 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Memory Mapped IO Fixed clock driver
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*
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* Copyright (C) 2018 Cadence Design Systems, Inc.
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*
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* Authors:
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* Jan Kotas <jank@cadence.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/of_address.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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static struct clk_hw *fixed_mmio_clk_setup(struct device_node *node)
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{
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struct clk_hw *clk;
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const char *clk_name = node->name;
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void __iomem *base;
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u32 freq;
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int ret;
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base = of_iomap(node, 0);
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if (!base) {
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pr_err("%pOFn: failed to map address\n", node);
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return ERR_PTR(-EIO);
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}
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freq = readl(base);
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iounmap(base);
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of_property_read_string(node, "clock-output-names", &clk_name);
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clk = clk_hw_register_fixed_rate(NULL, clk_name, NULL, 0, freq);
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if (IS_ERR(clk)) {
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pr_err("%pOFn: failed to register fixed rate clock\n", node);
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return clk;
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}
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ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, clk);
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if (ret) {
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pr_err("%pOFn: failed to add clock provider\n", node);
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clk_hw_unregister(clk);
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clk = ERR_PTR(ret);
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}
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return clk;
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}
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static void __init of_fixed_mmio_clk_setup(struct device_node *node)
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{
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fixed_mmio_clk_setup(node);
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}
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CLK_OF_DECLARE(fixed_mmio_clk, "fixed-mmio-clock", of_fixed_mmio_clk_setup);
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/**
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* This is not executed when of_fixed_mmio_clk_setup succeeded.
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*/
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static int of_fixed_mmio_clk_probe(struct platform_device *pdev)
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{
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struct clk_hw *clk;
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clk = fixed_mmio_clk_setup(pdev->dev.of_node);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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platform_set_drvdata(pdev, clk);
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return 0;
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}
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static int of_fixed_mmio_clk_remove(struct platform_device *pdev)
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{
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struct clk_hw *clk = platform_get_drvdata(pdev);
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of_clk_del_provider(pdev->dev.of_node);
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clk_hw_unregister_fixed_rate(clk);
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return 0;
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}
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static const struct of_device_id of_fixed_mmio_clk_ids[] = {
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{ .compatible = "fixed-mmio-clock" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, of_fixed_mmio_clk_ids);
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static struct platform_driver of_fixed_mmio_clk_driver = {
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.driver = {
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.name = "of_fixed_mmio_clk",
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.of_match_table = of_fixed_mmio_clk_ids,
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},
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.probe = of_fixed_mmio_clk_probe,
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.remove = of_fixed_mmio_clk_remove,
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};
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module_platform_driver(of_fixed_mmio_clk_driver);
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MODULE_AUTHOR("Jan Kotas <jank@cadence.com>");
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MODULE_DESCRIPTION("Memory Mapped IO Fixed clock driver");
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MODULE_LICENSE("GPL v2");
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