mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-16 08:44:21 +08:00
c0222ac086
Pull MIPS updates from Ralf Baechle: "This is an unusually large pull request for MIPS - in parts because lots of patches missed the 3.18 deadline but primarily because some folks opened the flood gates. - Retire the MIPS-specific phys_t with the generic phys_addr_t. - Improvments for the backtrace code used by oprofile. - Better backtraces on SMP systems. - Cleanups for the Octeon platform code. - Cleanups and fixes for the Loongson platform code. - Cleanups and fixes to the firmware library. - Switch ATH79 platform to use the firmware library. - Grand overhault to the SEAD3 and Malta interrupt code. - Move the GIC interrupt code to drivers/irqchip - Lots of GIC cleanups and updates to the GIC code to use modern IRQ infrastructures and features of the kernel. - OF documentation updates for the GIC bindings - Move GIC clocksource driver to drivers/clocksource - Merge GIC clocksource driver with clockevent driver. - Further updates to bring the GIC clocksource driver up to date. - R3000 TLB code cleanups - Improvments to the Loongson 3 platform code. - Convert pr_warning to pr_warn. - Merge a bunch of small lantiq and ralink fixes that have been staged/lingering inside the openwrt tree for a while. - Update archhelp for IP22/IP32 - Fix a number of issues for Loongson 1B. - New clocksource and clockevent driver for Loongson 1B. - Further work on clk handling for Loongson 1B. - Platform work for Broadcom BMIPS. - Error handling cleanups for TurboChannel. - Fixes and optimization to the microMIPS support. - Option to disable the FTLB. - Dump more relevant information on machine check exception - Change binfmt to allow arch to examine PT_*PROC headers - Support for new style FPU register model in O32 - VDSO randomization. - BCM47xx cleanups - BCM47xx reimplement the way the kernel accesses NVRAM information. - Random cleanups - Add support for ATH25 platforms - Remove pointless locking code in some PCI platforms. - Some improvments to EVA support - Minor Alchemy cleanup" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits) MIPS: Add MFHC0 and MTHC0 instructions to uasm. MIPS: Cosmetic cleanups of page table headers. MIPS: Add CP0 macros for extended EntryLo registers MIPS: Remove now unused definition of phys_t. MIPS: Replace use of phys_t with phys_addr_t. MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig. MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO MIPS: <asm/types.h> fix indentation. MAINTAINERS: Add entry for BMIPS multiplatform kernel MIPS: Enable VDSO randomization MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration MIPS: Remove declaration of obsolete arch_init_clk_ops() MIPS: atomic.h: Reformat to fit in 79 columns MIPS: Apply `.insn' to fixup labels throughout MIPS: Fix microMIPS LL/SC immediate offsets MIPS: Kconfig: Only allow 32-bit microMIPS builds MIPS: signal.c: Fix an invalid cast in ISA mode bit handling MIPS: mm: Only build one microassembler that is suitable ...
233 lines
5.5 KiB
Plaintext
233 lines
5.5 KiB
Plaintext
menu "Clock Source drivers"
|
|
|
|
config CLKSRC_OF
|
|
bool
|
|
|
|
config CLKSRC_I8253
|
|
bool
|
|
|
|
config CLKEVT_I8253
|
|
bool
|
|
|
|
config I8253_LOCK
|
|
bool
|
|
|
|
config CLKBLD_I8253
|
|
def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
|
|
|
|
config CLKSRC_MMIO
|
|
bool
|
|
|
|
config DW_APB_TIMER
|
|
bool
|
|
|
|
config DW_APB_TIMER_OF
|
|
bool
|
|
select DW_APB_TIMER
|
|
select CLKSRC_OF
|
|
|
|
config ARMADA_370_XP_TIMER
|
|
bool
|
|
select CLKSRC_OF
|
|
|
|
config MESON6_TIMER
|
|
bool
|
|
select CLKSRC_MMIO
|
|
|
|
config ORION_TIMER
|
|
select CLKSRC_OF
|
|
select CLKSRC_MMIO
|
|
bool
|
|
|
|
config SUN4I_TIMER
|
|
select CLKSRC_MMIO
|
|
bool
|
|
|
|
config SUN5I_HSTIMER
|
|
select CLKSRC_MMIO
|
|
bool
|
|
|
|
config VT8500_TIMER
|
|
bool
|
|
|
|
config CADENCE_TTC_TIMER
|
|
bool
|
|
|
|
config CLKSRC_NOMADIK_MTU
|
|
bool
|
|
depends on (ARCH_NOMADIK || ARCH_U8500)
|
|
select CLKSRC_MMIO
|
|
help
|
|
Support for Multi Timer Unit. MTU provides access
|
|
to multiple interrupt generating programmable
|
|
32-bit free running decrementing counters.
|
|
|
|
config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
|
|
bool
|
|
depends on CLKSRC_NOMADIK_MTU
|
|
help
|
|
Use the Multi Timer Unit as the sched_clock.
|
|
|
|
config CLKSRC_DBX500_PRCMU
|
|
bool "Clocksource PRCMU Timer"
|
|
depends on UX500_SOC_DB8500
|
|
default y
|
|
help
|
|
Use the always on PRCMU Timer as clocksource
|
|
|
|
config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
|
|
bool "Clocksource PRCMU Timer sched_clock"
|
|
depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
|
|
default y
|
|
help
|
|
Use the always on PRCMU Timer as sched_clock
|
|
|
|
config CLKSRC_EFM32
|
|
bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
|
|
depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
|
|
select CLKSRC_MMIO
|
|
default ARCH_EFM32
|
|
help
|
|
Support to use the timers of EFM32 SoCs as clock source and clock
|
|
event device.
|
|
|
|
config ARM_ARCH_TIMER
|
|
bool
|
|
select CLKSRC_OF if OF
|
|
|
|
config ARM_ARCH_TIMER_EVTSTREAM
|
|
bool "Support for ARM architected timer event stream generation"
|
|
default y if ARM_ARCH_TIMER
|
|
depends on ARM_ARCH_TIMER
|
|
help
|
|
This option enables support for event stream generation based on
|
|
the ARM architected timer. It is used for waking up CPUs executing
|
|
the wfe instruction at a frequency represented as a power-of-2
|
|
divisor of the clock rate.
|
|
The main use of the event stream is wfe-based timeouts of userspace
|
|
locking implementations. It might also be useful for imposing timeout
|
|
on wfe to safeguard against any programming errors in case an expected
|
|
event is not generated.
|
|
This must be disabled for hardware validation purposes to detect any
|
|
hardware anomalies of missing events.
|
|
|
|
config ARM_GLOBAL_TIMER
|
|
bool
|
|
select CLKSRC_OF if OF
|
|
help
|
|
This options enables support for the ARM global timer unit
|
|
|
|
config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
|
|
bool
|
|
depends on ARM_GLOBAL_TIMER
|
|
default y
|
|
help
|
|
Use ARM global timer clock source as sched_clock
|
|
|
|
config ATMEL_PIT
|
|
select CLKSRC_OF if OF
|
|
def_bool SOC_AT91SAM9 || SOC_SAMA5
|
|
|
|
config CLKSRC_METAG_GENERIC
|
|
def_bool y if METAG
|
|
help
|
|
This option enables support for the Meta per-thread timers.
|
|
|
|
config CLKSRC_EXYNOS_MCT
|
|
def_bool y if ARCH_EXYNOS
|
|
depends on !ARM64
|
|
help
|
|
Support for Multi Core Timer controller on Exynos SoCs.
|
|
|
|
config CLKSRC_SAMSUNG_PWM
|
|
bool
|
|
help
|
|
This is a new clocksource driver for the PWM timer found in
|
|
Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
|
|
for all devicetree enabled platforms. This driver will be
|
|
needed only on systems that do not have the Exynos MCT available.
|
|
|
|
config FSL_FTM_TIMER
|
|
bool
|
|
help
|
|
Support for Freescale FlexTimer Module (FTM) timer.
|
|
|
|
config VF_PIT_TIMER
|
|
bool
|
|
help
|
|
Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
|
|
|
|
config SYS_SUPPORTS_SH_CMT
|
|
bool
|
|
|
|
config MTK_TIMER
|
|
select CLKSRC_OF
|
|
select CLKSRC_MMIO
|
|
bool
|
|
|
|
config SYS_SUPPORTS_SH_MTU2
|
|
bool
|
|
|
|
config SYS_SUPPORTS_SH_TMU
|
|
bool
|
|
|
|
config SYS_SUPPORTS_EM_STI
|
|
bool
|
|
|
|
config SH_TIMER_CMT
|
|
bool "Renesas CMT timer driver" if COMPILE_TEST
|
|
depends on GENERIC_CLOCKEVENTS
|
|
default SYS_SUPPORTS_SH_CMT
|
|
help
|
|
This enables build of a clocksource and clockevent driver for
|
|
the Compare Match Timer (CMT) hardware available in 16/32/48-bit
|
|
variants on a wide range of Mobile and Automotive SoCs from Renesas.
|
|
|
|
config SH_TIMER_MTU2
|
|
bool "Renesas MTU2 timer driver" if COMPILE_TEST
|
|
depends on GENERIC_CLOCKEVENTS
|
|
default SYS_SUPPORTS_SH_MTU2
|
|
help
|
|
This enables build of a clockevent driver for the Multi-Function
|
|
Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
|
|
This hardware comes with 16 bit-timer registers.
|
|
|
|
config SH_TIMER_TMU
|
|
bool "Renesas TMU timer driver" if COMPILE_TEST
|
|
depends on GENERIC_CLOCKEVENTS
|
|
default SYS_SUPPORTS_SH_TMU
|
|
help
|
|
This enables build of a clocksource and clockevent driver for
|
|
the 32-bit Timer Unit (TMU) hardware available on a wide range
|
|
SoCs from Renesas.
|
|
|
|
config EM_TIMER_STI
|
|
bool "Renesas STI timer driver" if COMPILE_TEST
|
|
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
|
default SYS_SUPPORTS_EM_STI
|
|
help
|
|
This enables build of a clocksource and clockevent driver for
|
|
the 48-bit System Timer (STI) hardware available on a SoCs
|
|
such as EMEV2 from former NEC Electronics.
|
|
|
|
config CLKSRC_QCOM
|
|
bool
|
|
|
|
config CLKSRC_VERSATILE
|
|
bool "ARM Versatile (Express) reference platforms clock source"
|
|
depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
|
|
select CLKSRC_OF
|
|
default y if MFD_VEXPRESS_SYSREG
|
|
help
|
|
This option enables clock source based on free running
|
|
counter available in the "System Registers" block of
|
|
ARM Versatile, RealView and Versatile Express reference
|
|
platforms.
|
|
|
|
config CLKSRC_MIPS_GIC
|
|
bool
|
|
depends on MIPS_GIC
|
|
select CLKSRC_OF
|
|
|
|
endmenu
|