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6065a244a0
__get_cpu_var() is used for multiple purposes in the kernel source. One of them is address calculation via the form &__get_cpu_var(x). This calculates the address for the instance of the percpu variable of the current processor based on an offset. Other use cases are for storing and retrieving data from the current processors percpu area. __get_cpu_var() can be used as an lvalue when writing data or on the right side of an assignment. __get_cpu_var() is defined as : #define __get_cpu_var(var) (*this_cpu_ptr(&(var))) __get_cpu_var() always only does an address determination. However, store and retrieve operations could use a segment prefix (or global register on other platforms) to avoid the address calculation. this_cpu_write() and this_cpu_read() can directly take an offset into a percpu area and use optimized assembly code to read and write per cpu variables. This patch converts __get_cpu_var into either an explicit address calculation using this_cpu_ptr() or into a use of this_cpu operations that use the offset. Thereby address calculations are avoided and less registers are used when code is generated. At the end of the patch set all uses of __get_cpu_var have been removed so the macro is removed too. The patch set includes passes over all arches as well. Once these operations are used throughout then specialized macros can be defined in non -x86 arches as well in order to optimize per cpu access by f.e. using a global register that may be set to the per cpu base. Transformations done to __get_cpu_var() 1. Determine the address of the percpu instance of the current processor. DEFINE_PER_CPU(int, y); int *x = &__get_cpu_var(y); Converts to int *x = this_cpu_ptr(&y); 2. Same as #1 but this time an array structure is involved. DEFINE_PER_CPU(int, y[20]); int *x = __get_cpu_var(y); Converts to int *x = this_cpu_ptr(y); 3. Retrieve the content of the current processors instance of a per cpu variable. DEFINE_PER_CPU(int, y); int x = __get_cpu_var(y) Converts to int x = __this_cpu_read(y); 4. Retrieve the content of a percpu struct DEFINE_PER_CPU(struct mystruct, y); struct mystruct x = __get_cpu_var(y); Converts to memcpy(&x, this_cpu_ptr(&y), sizeof(x)); 5. Assignment to a per cpu variable DEFINE_PER_CPU(int, y) __get_cpu_var(y) = x; Converts to __this_cpu_write(y, x); 6. Increment/Decrement etc of a per cpu variable DEFINE_PER_CPU(int, y); __get_cpu_var(y)++ Converts to __this_cpu_inc(y) Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: linux-ia64@vger.kernel.org Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Tejun Heo <tj@kernel.org>
683 lines
18 KiB
C
683 lines
18 KiB
C
/*
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* Architecture-specific setup.
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*
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* Copyright (C) 1998-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
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*
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* 2005-10-07 Keith Owens <kaos@sgi.com>
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* Add notify_die() hooks.
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*/
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#include <linux/cpu.h>
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#include <linux/pm.h>
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#include <linux/elf.h>
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#include <linux/errno.h>
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#include <linux/kallsyms.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/notifier.h>
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#include <linux/personality.h>
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#include <linux/sched.h>
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#include <linux/stddef.h>
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#include <linux/thread_info.h>
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#include <linux/unistd.h>
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#include <linux/efi.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/kdebug.h>
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#include <linux/utsname.h>
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#include <linux/tracehook.h>
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#include <linux/rcupdate.h>
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#include <asm/cpu.h>
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#include <asm/delay.h>
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#include <asm/elf.h>
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#include <asm/irq.h>
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#include <asm/kexec.h>
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#include <asm/pgalloc.h>
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#include <asm/processor.h>
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#include <asm/sal.h>
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#include <asm/switch_to.h>
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#include <asm/tlbflush.h>
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#include <asm/uaccess.h>
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#include <asm/unwind.h>
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#include <asm/user.h>
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#include "entry.h"
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#ifdef CONFIG_PERFMON
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# include <asm/perfmon.h>
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#endif
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#include "sigframe.h"
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void (*ia64_mark_idle)(int);
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unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
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EXPORT_SYMBOL(boot_option_idle_override);
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void (*pm_power_off) (void);
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EXPORT_SYMBOL(pm_power_off);
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void
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ia64_do_show_stack (struct unw_frame_info *info, void *arg)
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{
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unsigned long ip, sp, bsp;
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char buf[128]; /* don't make it so big that it overflows the stack! */
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printk("\nCall Trace:\n");
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do {
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unw_get_ip(info, &ip);
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if (ip == 0)
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break;
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unw_get_sp(info, &sp);
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unw_get_bsp(info, &bsp);
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snprintf(buf, sizeof(buf),
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" [<%016lx>] %%s\n"
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" sp=%016lx bsp=%016lx\n",
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ip, sp, bsp);
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print_symbol(buf, ip);
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} while (unw_unwind(info) >= 0);
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}
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void
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show_stack (struct task_struct *task, unsigned long *sp)
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{
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if (!task)
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unw_init_running(ia64_do_show_stack, NULL);
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else {
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struct unw_frame_info info;
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unw_init_from_blocked_task(&info, task);
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ia64_do_show_stack(&info, NULL);
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}
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}
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void
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show_regs (struct pt_regs *regs)
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{
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unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
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print_modules();
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printk("\n");
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show_regs_print_info(KERN_DEFAULT);
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printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
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regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
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init_utsname()->release);
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print_symbol("ip is at %s\n", ip);
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printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
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regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
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printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
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regs->ar_rnat, regs->ar_bspstore, regs->pr);
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printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
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regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
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printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
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printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
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printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
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regs->f6.u.bits[1], regs->f6.u.bits[0],
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regs->f7.u.bits[1], regs->f7.u.bits[0]);
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printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
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regs->f8.u.bits[1], regs->f8.u.bits[0],
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regs->f9.u.bits[1], regs->f9.u.bits[0]);
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printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
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regs->f10.u.bits[1], regs->f10.u.bits[0],
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regs->f11.u.bits[1], regs->f11.u.bits[0]);
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printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
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printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
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printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
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printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
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printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
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printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
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printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
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printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
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printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
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if (user_mode(regs)) {
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/* print the stacked registers */
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unsigned long val, *bsp, ndirty;
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int i, sof, is_nat = 0;
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sof = regs->cr_ifs & 0x7f; /* size of frame */
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ndirty = (regs->loadrs >> 19);
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bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
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for (i = 0; i < sof; ++i) {
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get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
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printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
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((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
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}
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} else
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show_stack(NULL, NULL);
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}
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/* local support for deprecated console_print */
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void
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console_print(const char *s)
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{
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printk(KERN_EMERG "%s", s);
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}
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void
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do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall)
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{
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if (fsys_mode(current, &scr->pt)) {
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/*
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* defer signal-handling etc. until we return to
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* privilege-level 0.
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*/
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if (!ia64_psr(&scr->pt)->lp)
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ia64_psr(&scr->pt)->lp = 1;
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return;
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}
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#ifdef CONFIG_PERFMON
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if (current->thread.pfm_needs_checking)
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/*
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* Note: pfm_handle_work() allow us to call it with interrupts
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* disabled, and may enable interrupts within the function.
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*/
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pfm_handle_work();
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#endif
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/* deal with pending signal delivery */
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if (test_thread_flag(TIF_SIGPENDING)) {
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local_irq_enable(); /* force interrupt enable */
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ia64_do_signal(scr, in_syscall);
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}
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if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME)) {
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local_irq_enable(); /* force interrupt enable */
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tracehook_notify_resume(&scr->pt);
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}
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/* copy user rbs to kernel rbs */
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if (unlikely(test_thread_flag(TIF_RESTORE_RSE))) {
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local_irq_enable(); /* force interrupt enable */
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ia64_sync_krbs();
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}
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local_irq_disable(); /* force interrupt disable */
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}
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static int __init nohalt_setup(char * str)
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{
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cpu_idle_poll_ctrl(true);
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return 1;
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}
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__setup("nohalt", nohalt_setup);
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#ifdef CONFIG_HOTPLUG_CPU
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/* We don't actually take CPU down, just spin without interrupts. */
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static inline void play_dead(void)
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{
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unsigned int this_cpu = smp_processor_id();
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/* Ack it */
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__this_cpu_write(cpu_state, CPU_DEAD);
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max_xtp();
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local_irq_disable();
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idle_task_exit();
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ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
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/*
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* The above is a point of no-return, the processor is
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* expected to be in SAL loop now.
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*/
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BUG();
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}
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#else
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static inline void play_dead(void)
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{
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BUG();
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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void arch_cpu_idle_dead(void)
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{
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play_dead();
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}
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void arch_cpu_idle(void)
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{
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void (*mark_idle)(int) = ia64_mark_idle;
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#ifdef CONFIG_SMP
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min_xtp();
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#endif
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rmb();
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if (mark_idle)
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(*mark_idle)(1);
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safe_halt();
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if (mark_idle)
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(*mark_idle)(0);
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#ifdef CONFIG_SMP
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normal_xtp();
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#endif
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}
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void
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ia64_save_extra (struct task_struct *task)
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{
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#ifdef CONFIG_PERFMON
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unsigned long info;
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#endif
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if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
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ia64_save_debug_regs(&task->thread.dbr[0]);
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#ifdef CONFIG_PERFMON
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if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
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pfm_save_regs(task);
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info = __this_cpu_read(pfm_syst_info);
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if (info & PFM_CPUINFO_SYST_WIDE)
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pfm_syst_wide_update_task(task, info, 0);
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#endif
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}
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void
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ia64_load_extra (struct task_struct *task)
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{
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#ifdef CONFIG_PERFMON
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unsigned long info;
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#endif
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if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
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ia64_load_debug_regs(&task->thread.dbr[0]);
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#ifdef CONFIG_PERFMON
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if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
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pfm_load_regs(task);
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info = __this_cpu_read(pfm_syst_info);
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if (info & PFM_CPUINFO_SYST_WIDE)
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pfm_syst_wide_update_task(task, info, 1);
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#endif
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}
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/*
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* Copy the state of an ia-64 thread.
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*
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* We get here through the following call chain:
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*
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* from user-level: from kernel:
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*
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* <clone syscall> <some kernel call frames>
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* sys_clone :
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* do_fork do_fork
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* copy_thread copy_thread
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*
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* This means that the stack layout is as follows:
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*
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* +---------------------+ (highest addr)
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* | struct pt_regs |
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* +---------------------+
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* | struct switch_stack |
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* +---------------------+
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* | |
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* | memory stack |
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* | | <-- sp (lowest addr)
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* +---------------------+
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*
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* Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
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* integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
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* with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
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* pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
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* the stack is page aligned and the page size is at least 4KB, this is always the case,
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* so there is nothing to worry about.
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*/
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int
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copy_thread(unsigned long clone_flags,
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unsigned long user_stack_base, unsigned long user_stack_size,
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struct task_struct *p)
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{
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extern char ia64_ret_from_clone;
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struct switch_stack *child_stack, *stack;
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unsigned long rbs, child_rbs, rbs_size;
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struct pt_regs *child_ptregs;
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struct pt_regs *regs = current_pt_regs();
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int retval = 0;
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child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
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child_stack = (struct switch_stack *) child_ptregs - 1;
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rbs = (unsigned long) current + IA64_RBS_OFFSET;
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child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
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/* copy parts of thread_struct: */
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p->thread.ksp = (unsigned long) child_stack - 16;
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/*
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* NOTE: The calling convention considers all floating point
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* registers in the high partition (fph) to be scratch. Since
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* the only way to get to this point is through a system call,
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* we know that the values in fph are all dead. Hence, there
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* is no need to inherit the fph state from the parent to the
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* child and all we have to do is to make sure that
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* IA64_THREAD_FPH_VALID is cleared in the child.
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*
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* XXX We could push this optimization a bit further by
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* clearing IA64_THREAD_FPH_VALID on ANY system call.
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* However, it's not clear this is worth doing. Also, it
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* would be a slight deviation from the normal Linux system
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* call behavior where scratch registers are preserved across
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* system calls (unless used by the system call itself).
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*/
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# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
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| IA64_THREAD_PM_VALID)
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# define THREAD_FLAGS_TO_SET 0
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p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
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| THREAD_FLAGS_TO_SET);
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ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
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if (unlikely(p->flags & PF_KTHREAD)) {
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if (unlikely(!user_stack_base)) {
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/* fork_idle() called us */
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return 0;
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}
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memset(child_stack, 0, sizeof(*child_ptregs) + sizeof(*child_stack));
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child_stack->r4 = user_stack_base; /* payload */
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child_stack->r5 = user_stack_size; /* argument */
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/*
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* Preserve PSR bits, except for bits 32-34 and 37-45,
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* which we can't read.
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*/
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child_ptregs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
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/* mark as valid, empty frame */
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child_ptregs->cr_ifs = 1UL << 63;
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child_stack->ar_fpsr = child_ptregs->ar_fpsr
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= ia64_getreg(_IA64_REG_AR_FPSR);
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child_stack->pr = (1 << PRED_KERNEL_STACK);
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child_stack->ar_bspstore = child_rbs;
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child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
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/* stop some PSR bits from being inherited.
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* the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
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* therefore we must specify them explicitly here and not include them in
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* IA64_PSR_BITS_TO_CLEAR.
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*/
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child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
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& ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
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return 0;
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}
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stack = ((struct switch_stack *) regs) - 1;
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/* copy parent's switch_stack & pt_regs to child: */
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memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
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/* copy the parent's register backing store to the child: */
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rbs_size = stack->ar_bspstore - rbs;
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memcpy((void *) child_rbs, (void *) rbs, rbs_size);
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if (clone_flags & CLONE_SETTLS)
|
|
child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
|
|
if (user_stack_base) {
|
|
child_ptregs->r12 = user_stack_base + user_stack_size - 16;
|
|
child_ptregs->ar_bspstore = user_stack_base;
|
|
child_ptregs->ar_rnat = 0;
|
|
child_ptregs->loadrs = 0;
|
|
}
|
|
child_stack->ar_bspstore = child_rbs + rbs_size;
|
|
child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
|
|
|
|
/* stop some PSR bits from being inherited.
|
|
* the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
|
|
* therefore we must specify them explicitly here and not include them in
|
|
* IA64_PSR_BITS_TO_CLEAR.
|
|
*/
|
|
child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
|
|
& ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
|
|
|
|
#ifdef CONFIG_PERFMON
|
|
if (current->thread.pfm_context)
|
|
pfm_inherit(p, child_ptregs);
|
|
#endif
|
|
return retval;
|
|
}
|
|
|
|
static void
|
|
do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
|
|
{
|
|
unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
|
|
unsigned long uninitialized_var(ip); /* GCC be quiet */
|
|
elf_greg_t *dst = arg;
|
|
struct pt_regs *pt;
|
|
char nat;
|
|
int i;
|
|
|
|
memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
|
|
|
|
if (unw_unwind_to_user(info) < 0)
|
|
return;
|
|
|
|
unw_get_sp(info, &sp);
|
|
pt = (struct pt_regs *) (sp + 16);
|
|
|
|
urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
|
|
|
|
if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
|
|
return;
|
|
|
|
ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
|
|
&ar_rnat);
|
|
|
|
/*
|
|
* coredump format:
|
|
* r0-r31
|
|
* NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
|
|
* predicate registers (p0-p63)
|
|
* b0-b7
|
|
* ip cfm user-mask
|
|
* ar.rsc ar.bsp ar.bspstore ar.rnat
|
|
* ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
|
|
*/
|
|
|
|
/* r0 is zero */
|
|
for (i = 1, mask = (1UL << i); i < 32; ++i) {
|
|
unw_get_gr(info, i, &dst[i], &nat);
|
|
if (nat)
|
|
nat_bits |= mask;
|
|
mask <<= 1;
|
|
}
|
|
dst[32] = nat_bits;
|
|
unw_get_pr(info, &dst[33]);
|
|
|
|
for (i = 0; i < 8; ++i)
|
|
unw_get_br(info, i, &dst[34 + i]);
|
|
|
|
unw_get_rp(info, &ip);
|
|
dst[42] = ip + ia64_psr(pt)->ri;
|
|
dst[43] = cfm;
|
|
dst[44] = pt->cr_ipsr & IA64_PSR_UM;
|
|
|
|
unw_get_ar(info, UNW_AR_RSC, &dst[45]);
|
|
/*
|
|
* For bsp and bspstore, unw_get_ar() would return the kernel
|
|
* addresses, but we need the user-level addresses instead:
|
|
*/
|
|
dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
|
|
dst[47] = pt->ar_bspstore;
|
|
dst[48] = ar_rnat;
|
|
unw_get_ar(info, UNW_AR_CCV, &dst[49]);
|
|
unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
|
|
unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
|
|
dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
|
|
unw_get_ar(info, UNW_AR_LC, &dst[53]);
|
|
unw_get_ar(info, UNW_AR_EC, &dst[54]);
|
|
unw_get_ar(info, UNW_AR_CSD, &dst[55]);
|
|
unw_get_ar(info, UNW_AR_SSD, &dst[56]);
|
|
}
|
|
|
|
void
|
|
do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
|
|
{
|
|
elf_fpreg_t *dst = arg;
|
|
int i;
|
|
|
|
memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
|
|
|
|
if (unw_unwind_to_user(info) < 0)
|
|
return;
|
|
|
|
/* f0 is 0.0, f1 is 1.0 */
|
|
|
|
for (i = 2; i < 32; ++i)
|
|
unw_get_fr(info, i, dst + i);
|
|
|
|
ia64_flush_fph(task);
|
|
if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
|
|
memcpy(dst + 32, task->thread.fph, 96*16);
|
|
}
|
|
|
|
void
|
|
do_copy_regs (struct unw_frame_info *info, void *arg)
|
|
{
|
|
do_copy_task_regs(current, info, arg);
|
|
}
|
|
|
|
void
|
|
do_dump_fpu (struct unw_frame_info *info, void *arg)
|
|
{
|
|
do_dump_task_fpu(current, info, arg);
|
|
}
|
|
|
|
void
|
|
ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
|
|
{
|
|
unw_init_running(do_copy_regs, dst);
|
|
}
|
|
|
|
int
|
|
dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
|
|
{
|
|
unw_init_running(do_dump_fpu, dst);
|
|
return 1; /* f0-f31 are always valid so we always return 1 */
|
|
}
|
|
|
|
/*
|
|
* Flush thread state. This is called when a thread does an execve().
|
|
*/
|
|
void
|
|
flush_thread (void)
|
|
{
|
|
/* drop floating-point and debug-register state if it exists: */
|
|
current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
|
|
ia64_drop_fpu(current);
|
|
}
|
|
|
|
/*
|
|
* Clean up state associated with current thread. This is called when
|
|
* the thread calls exit().
|
|
*/
|
|
void
|
|
exit_thread (void)
|
|
{
|
|
|
|
ia64_drop_fpu(current);
|
|
#ifdef CONFIG_PERFMON
|
|
/* if needed, stop monitoring and flush state to perfmon context */
|
|
if (current->thread.pfm_context)
|
|
pfm_exit_thread(current);
|
|
|
|
/* free debug register resources */
|
|
if (current->thread.flags & IA64_THREAD_DBG_VALID)
|
|
pfm_release_debug_registers(current);
|
|
#endif
|
|
}
|
|
|
|
unsigned long
|
|
get_wchan (struct task_struct *p)
|
|
{
|
|
struct unw_frame_info info;
|
|
unsigned long ip;
|
|
int count = 0;
|
|
|
|
if (!p || p == current || p->state == TASK_RUNNING)
|
|
return 0;
|
|
|
|
/*
|
|
* Note: p may not be a blocked task (it could be current or
|
|
* another process running on some other CPU. Rather than
|
|
* trying to determine if p is really blocked, we just assume
|
|
* it's blocked and rely on the unwind routines to fail
|
|
* gracefully if the process wasn't really blocked after all.
|
|
* --davidm 99/12/15
|
|
*/
|
|
unw_init_from_blocked_task(&info, p);
|
|
do {
|
|
if (p->state == TASK_RUNNING)
|
|
return 0;
|
|
if (unw_unwind(&info) < 0)
|
|
return 0;
|
|
unw_get_ip(&info, &ip);
|
|
if (!in_sched_functions(ip))
|
|
return ip;
|
|
} while (count++ < 16);
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
cpu_halt (void)
|
|
{
|
|
pal_power_mgmt_info_u_t power_info[8];
|
|
unsigned long min_power;
|
|
int i, min_power_state;
|
|
|
|
if (ia64_pal_halt_info(power_info) != 0)
|
|
return;
|
|
|
|
min_power_state = 0;
|
|
min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
|
|
for (i = 1; i < 8; ++i)
|
|
if (power_info[i].pal_power_mgmt_info_s.im
|
|
&& power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
|
|
min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
|
|
min_power_state = i;
|
|
}
|
|
|
|
while (1)
|
|
ia64_pal_halt(min_power_state);
|
|
}
|
|
|
|
void machine_shutdown(void)
|
|
{
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
int cpu;
|
|
|
|
for_each_online_cpu(cpu) {
|
|
if (cpu != smp_processor_id())
|
|
cpu_down(cpu);
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_KEXEC
|
|
kexec_disable_iosapic();
|
|
#endif
|
|
}
|
|
|
|
void
|
|
machine_restart (char *restart_cmd)
|
|
{
|
|
(void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
|
|
efi_reboot(REBOOT_WARM, NULL);
|
|
}
|
|
|
|
void
|
|
machine_halt (void)
|
|
{
|
|
(void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
|
|
cpu_halt();
|
|
}
|
|
|
|
void
|
|
machine_power_off (void)
|
|
{
|
|
if (pm_power_off)
|
|
pm_power_off();
|
|
machine_halt();
|
|
}
|
|
|