linux/arch/arm64/mm
Vladimir Murzin 5ffdfaedfa arm64: mm: Support Common Not Private translations
Common Not Private (CNP) is a feature of ARMv8.2 extension which
allows translation table entries to be shared between different PEs in
the same inner shareable domain, so the hardware can use this fact to
optimise the caching of such entries in the TLB.

CNP occupies one bit in TTBRx_ELy and VTTBR_EL2, which advertises to
the hardware that the translation table entries pointed to by this
TTBR are the same as every PE in the same inner shareable domain for
which the equivalent TTBR also has CNP bit set. In case CNP bit is set
but TTBR does not point at the same translation table entries for a
given ASID and VMID, then the system is mis-configured, so the results
of translations are UNPREDICTABLE.

For kernel we postpone setting CNP till all cpus are up and rely on
cpufeature framework to 1) patch the code which is sensitive to CNP
and 2) update TTBR1_EL1 with CNP bit set. TTBR1_EL1 can be
reprogrammed as result of hibernation or cpuidle (via __enable_mmu).
For these two cases we restore CnP bit via __cpu_suspend_exit().

There are a few cases we need to care of changes in TTBR0_EL1:
  - a switch to idmap
  - software emulated PAN

we rule out latter via Kconfig options and for the former we make
sure that CNP is set for non-zero ASIDs only.

Reviewed-by: James Morse <james.morse@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
[catalin.marinas@arm.com: default y for CONFIG_ARM64_CNP]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-09-18 12:02:27 +01:00
..
cache.S arm64: IPI each CPU after invalidating the I-cache for kernel mappings 2018-07-05 17:24:36 +01:00
context.c arm64: mm: Support Common Not Private translations 2018-09-18 12:02:27 +01:00
copypage.c arm64: Defer dcache flush in __cpu_copy_user_page 2015-12-17 11:07:13 +00:00
dma-mapping.c kernel/dma: remove unsupported gfp_mask parameter from dma_alloc_from_contiguous() 2018-08-17 16:20:32 -07:00
dump.c arm64: dump: Use consistent capitalisation for page-table dumps 2018-09-10 16:15:23 +01:00
extable.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
fault.c arm64: cpu: Move errata and feature enable callbacks closer to callers 2018-09-14 17:46:22 +01:00
flush.c arm64: mm: Export __sync_icache_dcache() for xen-privcmd 2018-07-27 13:12:15 +01:00
hugetlbpage.c mm: do not initialize TLB stack vma's with vma_init() 2018-08-01 13:43:38 -07:00
init.c A couple of arm64 fixes 2018-08-17 11:48:04 -07:00
ioremap.c arm64: use is_vmalloc_addr 2017-02-09 13:47:56 +00:00
kasan_init.c arm64: kasan: avoid pfn_to_nid() before page array is initialized 2018-04-17 16:16:59 +01:00
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
mmap.c exec: pass stack rlimit into mm layout functions 2018-04-11 10:28:37 -07:00
mmu.c arm64: Implement page table free interfaces 2018-07-06 13:17:19 +01:00
numa.c arm64: numa: separate out updates to percpu nodeid and NUMA node cpumap 2018-07-06 13:18:18 +01:00
pageattr.c arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables 2018-02-16 18:13:57 +00:00
pgd.c arm64: handle 52-bit addresses in TTBR 2017-12-22 17:35:21 +00:00
physaddr.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
proc.S arm64: mm: Support Common Not Private translations 2018-09-18 12:02:27 +01:00
ptdump_debugfs.c ARM64: dump: Convert to use DEFINE_SHOW_ATTRIBUTE macro 2018-07-02 10:36:37 +01:00