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046c217c65
s3c2440 uses fclk/n (fclk divided by n) clock as one of the possible clocks used to generate the baud rate clock. The divider 'n' in this case can be logically represented outside of the uart controller. This patch creates a new clock by name "fclk_n" for s3c2440 based platforms to represent the fclk/n clock in the platform code. This clock provides a get_rate callback that checks the UCON0/1/2 registers to determine the clock rate. The samsung uart driver would receive the "fclk_n" clock name as one of the possible baud rate clock options and the driver need not determine clock rate of fclk/n. Cc: Ben Dooks <ben-linux@fluff.org> Cc: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> |
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.. | ||
include/mach | ||
clock.c | ||
dma.c | ||
dsc.c | ||
irq.c | ||
Kconfig | ||
mach-anubis.c | ||
mach-at2440evb.c | ||
mach-gta02.c | ||
mach-mini2440.c | ||
mach-nexcoder.c | ||
mach-osiris-dvs.c | ||
mach-osiris.c | ||
mach-rx1950.c | ||
mach-rx3715.c | ||
mach-smdk2440.c | ||
Makefile | ||
s3c244x-clock.c | ||
s3c244x-irq.c | ||
s3c244x.c | ||
s3c2440-cpufreq.c | ||
s3c2440-pll-12000000.c | ||
s3c2440-pll-16934400.c | ||
s3c2440.c | ||
s3c2442.c |