Duncan Ma 5e8a0d3598 drm/amd/display: Negate IPS allow and commit bits ... [WHY] On s0i3, IPS mask isn't saved and restored. It is reset to zero on exit. If it is cleared unexpectedly, driver will proceed operations while DCN is in IPS2 and cause a hang. [HOW] Negate the bit logic. Default value of zero indicates it is still in IPS2. Driver must poll for the bit to assert. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Duncan Ma <duncan.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-11-17 00:53:10 -05:00
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drm	drm/amd/display: Negate IPS allow and commit bits	2023-11-17 00:53:10 -05:00
host1x	gpu: host1x: Correct allocated size for contexts	2023-10-11 22:52:44 +02:00
ipu-v3	drm for 6.6-rc1	2023-08-30 13:34:34 -07:00
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